
Verification Expert Required
1 day ago
A seasoned verification expert is required to lead the design verification process. This individual will develop and execute comprehensive test plans to verify complex ASIC designs, utilizing System Verilog (SV) and UVM methodologies for verification tasks.
The successful candidate will be responsible for functional, formal, GLS (Gate-Level Simulation), power, and CPU verification. They will also conduct IP and subsystem-level verification, ensuring robust verification of high-speed protocols.
Working closely with RTL designers to understand design specifications and requirements is a key aspect of this position. The engineer will write and maintain C/C++ test benches for verification environments and perform coverage analysis and drive coverage closure.
Debugging issues found during verification and working with design teams to resolve them is another critical responsibility. Participating in design and verification reviews, providing insights and suggestions for improvements is also essential.
This role requires a strong understanding of verification models and techniques, as well as excellent communication and teamwork abilities.
Key Responsibilities:
- Develop and execute comprehensive test plans to verify complex ASIC designs
- Utilize System Verilog (SV) and UVM methodologies for verification tasks
- Perform functional, formal, GLS (Gate-Level Simulation), power, and CPU verification
- Conduct IP and subsystem-level verification, ensuring robust verification of high-speed protocols
- Work closely with RTL designers to understand design specifications and requirements
- Write and maintain C/C++ test benches for verification environments
- Perform coverage analysis and drive coverage closure
- Debug issues found during verification and work with design teams to resolve them
- Participate in design and verification reviews, providing insights and suggestions for improvements
- Develop verification models and ensure their accuracy and performance
Requirements include a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. A minimum of 3 years of experience in ASIC design verification is also necessary. Proficiency in System Verilog, UVM, and C/C++ is required, along with knowledge of functional, formal, GLS, power, and CPU verification methodologies. Experience with high-speed protocols and IP verification is also beneficial.
Senior Roles:
- Applicants may be considered for senior roles including Senior Verification Engineer, Lead Verification Engineer, Senior Lead Verification Engineer, and Staff Engineer.
- Each of these roles requires additional qualifications and experience based on industry standards.
Our company offers a competitive salary and benefits package, as well as opportunities to work on cutting-edge technology and projects. Professional development and career advancement opportunities are also available.
About Us:
- We are a leading provider of product engineering and testing services.
- We have expertise in various domains including automotive, industrial, consumer electronics, aerospace, medical devices, and telecommunications.
- Our team consists of highly skilled engineers with extensive knowledge of cutting-edge technologies.
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