Senior Digital Forensic Test Specialist

6 days ago

India beBeeDigitalForensic Full time ₹ 15,00,000 - ₹ 30,00,000
Job Title:

Digital Forensic Test Engineer

About the Role:

We are seeking a highly skilled and experienced Digital Forensic Test Engineer to drive digital forensic architecture, planning, and implementation across complex SoC/ASIC designs.

Key Responsibilities:
  • Define and drive digital forensic strategy and architecture for multiple ASIC/SoC projects.
  • Lead implementation and verification of digital forensic features like scan insertion and compression (e.g., EDT), ATPG pattern generation and fault grading, MBIST and Logic BIST insertion and validation, boundary scan (IEEE 1149.1/1149.6), IJTAG (1687).
  • Manage end-to-end digital forensic flow from RTL to gate-level netlist and silicon bring-up.
  • Collaborate with RTL, STA, PD, and test engineering teams for seamless integration.
  • Perform pattern generation, fault simulation, and debug test coverage gaps.
  • Own digital forensic signoff, timing closure (DFT-related paths), and ATE pattern delivery.
  • Support silicon bring-up, test vector validation on ATE, and yield optimization.
  • Mentor and guide junior DFT engineers; conduct design reviews and training sessions.
  • Develop and maintain digital forensic automation scripts and infrastructure.
Required Skills and Experience:
  • Bachelor's or Master's degree in Electronics, Electrical, or VLSI Design.
  • 7+ years of experience in digital forensic testing for complex ASIC or SoC designs.
  • Expertise in scan insertion, compression, ATPG, MBIST, and boundary scan.
  • Hands-on experience with digital forensic tools such as Synopsys: DFT Compiler, TetraMAX, TestMAX, Siemens EDA: Tessent ScanPro, MBIST, IJTAG, Cadence/others: Modus, Encounter Test.
  • Strong knowledge of RTL design, STA, and synthesis flows.
  • Proficient in scripting languages (Python, Perl, Tcl) for flow automation.
  • Deep understanding of silicon test challenges and test coverage improvement.
  • Strong leadership, team collaboration, and communication skills.
Benefits:
  • Opportunity to lead digital forensic efforts for high-performance, next-gen SoCs and ASICs.
  • Chance to collaborate with top-tier engineers and global semiconductor leaders.
  • Competitive salary, leadership exposure, and fast-track growth opportunities.

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