Power Solutions Development Expert

1 week ago

Bengaluru, Karnataka, India beBeeMixedSignalVerification Full time ₹ 20,00,000 - ₹ 27,00,000

Power Solutions Development Engineer Role

We are seeking a skilled Power Solutions Development Engineer to join our team in India. The successful candidate will be part of the HVP team at Texas Instruments (TI), working on developing power solutions for various end-equipments with high voltage withstand capability.

This is an exciting opportunity for an individual who wants to build a team and gain technical expertise while being part of a larger organization like TI.

Key Responsibilities:

  • Develop detailed verification plans in collaboration with system and design teams.
  • Create behavioral models of analog blocks using SV RNM, verilogAMS (wreal, electrical).
  • Identify and develop system-level tests in AMS to ensure bug-free silicon.
  • Design and implement SV/UVM-based testbenches, tests, checkers, assertions, and enhance with randomization and coverage.
  • Innovate and drive new design verification methodologies as needed, collaborating with the EDA team to upgrade tools and flows.
  • Interact with Test/Validation teams in post-silicon activities and customer debug/analysis.
  • Mentor and lead junior colleagues, driving smart initiatives within the team.
  • Closely collaborate with DMS/DV teams to understand SOC – RTL verification and support project requirements.
Required Qualifications:
  • Strong foundation in mixed-signal designs, including analog building blocks, digital design processes, and top-level integration.
  • Experience in developing mixed-signal testbenches in SV/UVM from scratch, debugging, and optimizing simulation performance.
  • Simulation debug capability, analyzing waveforms, and pinpointing issues in schematics simulation or models.
  • Knowledge on analog controllers to develop system testbenches and debug issues.
  • Bachelor's/Master's degree in Electrical/Electronics Engineering.
Preferred Skills/Experience:
  • 5+ years of experience in mixed-signal design verification.
  • Hands-on experience/expertise in working with SOC and developing SOC-AMS testbenches.
  • Expertise in developing simulation/DV plans, Cadence Mixed-Signal Design Environment tools, and regression flows.
  • Proficiency in HDL languages – system Verilog, UVM, verilogAMS, and automation using Python/Perl/Tcl/shell scripting.

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