Senior Verification Specialist

1 day ago

Mangalore, Karnataka, India beBeeVerification Full time ₹ 18,00,000 - ₹ 25,00,000
Job Title:

Senior Verification Engineer

Job Description:

The primary responsibility of this position is to lead the development, planning and execution of comprehensive verification strategies for analog/mixed-signal IPs and System-on-Chips (SoCs). This includes developing and implementing detailed verification plans, including testbenches, stimulus generation, and checking strategies to ensure thorough coverage. Additionally, the candidate will be responsible for designing and maintaining sophisticated SystemVerilog, Verilog-AMS, or Universal Verification Methodology (UVM)-based verification environments for complex designs.

Furthermore, the candidate will perform co-simulation of analog/digital designs using industry-leading tools such as Cadence, Synopsys, and Siemens EDA. They will also conduct mixed-signal simulations, behavioral modeling of analog blocks, and integration into top-level environments to achieve seamless system verification.

Moreover, the candidate will work closely with analog designers to create accurate AMS behavioral models (e.g., Verilog-A/AMS) for early integration and verification, and mentor junior engineers in best practices and methodologies. They will also drive coverage analysis and sign-off using functional, formal, and assertion-based methods, and guarantee that verification deliverables meet project timelines and quality standards.

Required Skills and Qualifications:

Minimum 8+ years of hands-on experience in AMS verification, specifically in IP/SoC projects.

Demonstrated expertise in building verification environments using SystemVerilog, Verilog-AMS, or UVM.

Strong background in mixed-signal simulation and behavioral modeling.

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

This position is open for multiple locations across India.

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