Senior SoC Design for Test Expert

1 week ago

Tiruchi, Tamil Nadu, India beBeeDesignEngineer Full time ₹ 1,50,00,000 - ₹ 2,20,00,000

As a Design for Test (DFT) Engineer, you will play a key role in shaping the architecture of complex SoCs.

The ideal candidate will have hands-on experience with industry-standard scripting languages like Python, Perl, and TCL. They should also have a solid understanding of the SoC design cycle, RTL to GDSII flow, and test requirements.

Responsibilities:

  • Drive DFT architecture definition and implementation.
  • Plan, execute, and deliver scan, ATPG, MBIST, and boundary scan insertion and validation.
  • Work with EDA vendors to evaluate, deploy, and optimize DFT tool flows.
  • Automate repetitive tasks using scripting to improve efficiency.
  • Support test vector generation and validation.
  • Provide technical guidance to junior engineers.

PREFERRED SKILLS:

  • Knowledge of low-power DFT techniques.
  • Experience with post-silicon bring-up and ATE patterns.
  • Familiarity with safety-critical standards.
  • Exposure to High-Speed IO testing.

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