Software Engineering Manager for DFT

2 weeks ago

Ghaziabad, Uttar Pradesh, India beBeeDft Full time ₹ 20,00,000 - ₹ 25,00,000

Role: DFT Engineer

Experience: 3+ years of experience in designing and implementing DFT architectures and methodologies.

Our organization is seeking a skilled individual to fill the position of Software Design Engineer in Test.

Key Responsibilities:

  • Drive DFT architecture definition and implementation for complex SoCs.
  • Plan, execute, and deliver scan, ATPG, MBIST, and boundary scan insertion and validation.
  • Work with EDA vendors to evaluate, deploy, and optimize DFT tool flows.
  • Automate repetitive tasks using scripting to improve efficiency and reduce errors.
  • Support test vector generation and validation for ATE.
  • Provide technical guidance and mentorship to junior engineers in the DFT team.

Required Skills and Qualifications:

We are looking for individuals with strong expertise in DFT architectures and methodologies, including scan insertion & verification, ATPG, MBIST, JTAG / boundary scan. Familiarity with industry-standard DFT tools and methodologies from Cadence, Synopsys, and Mentor Graphics (Siemens EDA) is also required. Proven ability to develop and debug scripting solutions using Python, Perl, and TCL for automation of DFT flows is necessary. Solid understanding of SoC design cycle, RTL to GDSII flow, and test requirements is essential.

Preferred Skills:

  • Knowledge of low-power DFT techniques (power-aware ATPG, retention flops, etc.).
  • Experience with post-silicon bring-up and ATE patterns.
  • Familiarity with safety-critical standards (ISO 26262, DO-254, etc.).
  • Exposure to High-Speed IO testing (SERDES, DDR, etc.).

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