Visionary Memory Architect

2 days ago

Kurnool, Andhra Pradesh, India beBeeSenior Full time ₹ 18,00,000 - ₹ 21,00,000
Job Title: Senior Design Engineer

We are seeking an experienced and skilled Senior Design Engineer to join our team. As a senior member of the engineering team, you will play a key role in developing memory compilers and memory Fast Cache instances for our next generation Cores.

This is a challenging opportunity for an engineer who wants to make a significant impact on the design and development of cutting-edge memory technologies. You will work closely with our design verification team to ensure that our memory designs meet the required performance, power, and area (PPA) targets.

Required Skills and Qualifications

To be successful in this role, you will need to have:

  • A strong understanding of computer architecture and concepts
  • Good knowledge of SRAM architecture, Critical Path Modelling, Full Cut Analysis, and Monte Carlo Simulations
  • Experience in design verification, including sense amplifier analysis, self-time analysis, and marginality analysis
  • Understanding of high-speed/low-power CMOS circuit design, clocking schemes, static, and complex logic circuits
  • Knowledge of Power versus Performance versus Area trade-offs in typical CMOS design
  • Strong knowledge of physical implementation impact on circuit performance
  • Proven experience as a designated responsible individual for a memory design, leading a small team of designers

You should also have good interpersonal skills and be able to work effectively in a team environment.

Responsibilities

As a Senior Design Engineer, your responsibilities will include:

  • Designing and developing digital circuits for memory blocks like SRAM, register files, and caches
  • Performing simulations and verification to ensure functionality and optimize for power, performance, area, timing, and yield
  • Maintaining and improving existing designs to meet changing requirements
  • Collaborating with cross-functional teams to identify and prioritize design improvements
Benefits

We offer a competitive salary and benefits package, as well as opportunities for professional growth and development. If you are a motivated and talented engineer looking for a new challenge, please apply today.

Others

This is a full-time position, requiring at least 7 years of experience in SRAM/memory design margin, char, and quality checks. Experience with Cadence or Synopsys flows is a plus. A strong knowledge of circuit simulation and optimization of standard cells is also desirable.

If you have a passion for designing innovative memory solutions and want to join a dynamic team, we encourage you to apply. We look forward to hearing from you

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