
Verification Expert Leader
3 days ago
We are seeking a skilled and motivated verification expert to lead our advanced design verification team. The ideal candidate will have strong expertise in SystemVerilog, UVM (Universal Verification Methodology), and verification of industry-standard protocols such as PCIe, USB, Ethernet, DDR, I²C, SPI, etc.
The Design Verification Lead will oversee the verification of complex SoC and IP designs, mentor engineers, and collaborate closely with design, architecture, and validation teams to deliver high-quality, robust products.
Main Responsibilities:- Lead the design verification efforts for complex SoC/IP projects following best practices.
- Develop and maintain verification environments using SystemVerilog and UVM.
- Plan verification strategy, including defining test plans, coverage goals, and methodology.
- Perform functional verification, assertion-based verification, and coverage analysis.
- Verify standard industry protocols such as PCIe, USB, Ethernet, DDR, I²C, SPI, etc.
- Define and track verification milestones, ensuring timely delivery of verification goals.
- Debug complex functional and protocol-level issues using simulators and analysis tools.
- Collaborate with RTL designers, architects, and software teams to ensure seamless integration.
- Mentor junior verification engineers on SystemVerilog, UVM, and protocol specifics.
- Implement and improve automation in the verification environment using scripting languages such as Python, Perl, TCL.
- Drive continuous improvement of the verification flow, tools, and methodologies.
- Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related field.
- 8+ years of experience in design verification of SoC/IP.
- Strong hands-on experience in SystemVerilog and UVM methodology.
- In-depth knowledge of industry-standard protocols: PCIe, USB, Ethernet, DDR, I²C, SPI, etc.
- Experience in simulation tools such as Cadence Incisive/Xcelium, Synopsys VCS, Mentor Questa, etc.
- Proficient in debugging complex RTL and verification issues.
- Strong scripting skills in Python, Perl, TCL, or Shell Scripting.
- Solid understanding of assertion-based verification (SVA).
- Experience in code and functional coverage analysis and achieving coverage closure.
- Excellent problem-solving, communication, and leadership skills.
- Proven ability to lead and mentor a team of engineers.
- Experience with formal verification tools.
- Knowledge of UVM factory patterns and sequence customization.
- Hands-on experience with Continuous Integration (CI) for verification flows.
- Exposure to emulation platforms and FPGA-based prototyping.
Exciting projects in cutting-edge semiconductor design.
Collaborative and innovative work environment.
Opportunities for career growth and skill development.
Competitive salary and benefits.
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