Verification Engineer

Job Title - SOC Verification Engineer Experience - 5+years Location - BangaloreKey Responsibilities:Develop and execute detailed verification plans for SoC designs, ensuring compliance with industry standards and design specifications. Perform functional verification using advanced methodologies like UVM/OVM and SystemVerilog. Create and maintain...

L&T Technology is hiring for AMS Verification Engineers with 4-8 Years of experience.Job Location : Bangalore, IndiaBelow is the key responsibilities ::Complete ownership of AMS verification for complex mixed signal blocks like PLL, DFE, transmitters, receivers etc.Should understand the JDEC spec for DDR interface and define verification...

We are seeking an experienced pre-silicon verification engineer to join our team and help us enhance our configurable testbench.The RoleThis position is focused on verifying new features for client, server, graphics, and semi-custom interconnects using System Verilog / UVM-based testbenches.Key ResponsibilitiesDevelop and enhance testbenches to verify new...

Job Title :IP Verification Engineer – UVM verificationExp Level:4+ yrsLocation:Bangalore/HyderabadJob Description:System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip...

Job Title: AMS Verification EngineerExperience Required:Minimum 4 years relevant experience is required.Location:Bangalore, Hyderabad, Noida, Chennai, Ahmedabad, PuneKey Responsibilities:Min 4 Years of overall experience in ASIC VerificationShould have worked on AMS Verification for minimum of 2 yearsDevelop and execute verification plans for AMS...

As a verification lead, you will be responsible for designing and implementing verification environments for complex SoC designs.Key Responsibilities:Verification Environment Development: Design and implement verification environments for complex SoC designs using SystemVerilog.Testbench Development: Develop and maintain SystemVerilog testbenches using C...

You will be responsible for developing a deeper understanding of standard bus protocols like (AHB/AHB5/AXI4/ACE/CHI-B, C, D, E etc.) and develop SW Softmodel / RTL IPs / accelerated VIPs using C/C / SystemVerilog/SystemC/ UVM, make them perfect for Simulation (Questa) and Emulation (Platform), helping customers to deploy and use them in their Verification...

About the CompanyWe are a leading technology company dedicated to innovation and excellence in the field of electronic engineering. Our mission is to deliver cutting-edge solutions that empower our clients and enhance their capabilities. We foster a collaborative culture that values diversity, creativity, and continuous improvement. About the RoleThe role...

-We are seeking a highly skilled and experienced Senior Design Verification Engineer to join our SoC/ASIC verification team in Bangalore. The ideal candidate will have a deep understanding of the verification lifecycle, from test planning to coverage closure, and be able to independently drive complex verification tasks for IP, subsystem, or full-chip level...

ACL Digital Hiring for the below requirement Designation: DV engineers Experience: 8-10+ years Location: Bangalore Job Description: 1. Hands-on experiences on SV/UVM/Specman 2. Familiarity with formal-based verification 3. Running regression and debugging failures independently 4. Experience in functional and code coverages 5. Independently handling...