Senior Staff RTL/Integration Design Engineer

6 days ago

Pune, Maharashtra, India Lattice Semiconductor Full time

Overview

Lattice Semiconductor is a world-class company that thrives on energy and enthusiasm. Our international teams are dedicated to developing programmable logic solutions that are revolutionizing the industry. We focus on R&D, product innovation, and customer service, bringing total commitment and a keenly sharp competitive personality.

Responsibilities & Skills

Role specifics:

  • This is a full-time individual contributor position located in an international setting.
  • The role will focus on FPGA projects across different time zones.
  • The qualified candidate will be an expert in RTL design, best-in-class coding styles, algorithms, and both Verilog and System Verilog.
  • The qualified candidate will be expert in SoC integration and associated quality checks including lint, CDC, RDC, SDC, etc.
  • The role requires working with the architecture team to define micro-architecture and design spec.
  • The successful candidate will be open and willing to both teach best-known-methods to an existing FPGA team and learn from the team about the complications of highly programmable FPGA fabrics.

Accountabilities:

  • Serve as a key contributor to FPGA design efforts.
  • Drive logic design of key FPGA blocks & full chip and bring best-in-class methodologies to accelerate design time and improve design quality.
  • Ensure design quality through assertions, checkers, and scripting.
  • Develop strong relationships with worldwide teams.
  • Entor and develop strong partners and colleagues.
  • Occasional travel as needed.

Qualifications:

  • BS/MS/PhD Electronics Engineering, Electrical Engineering, Computer Science or equivalent.
  • 14+ years of experience in driving logic design across a multitude of silicon projects.
  • Expertise in SoC integration, defining micro-architecture, and experience of selecting 3rd party IP.
  • Experience in working with ARM processor, AXI, AMBA bus, safety and security protocols, debug architecture.
  • Familiarity with FPGA designs, use-cases, and design considerations is a plus.
  • Independent worker and leader with demonstrated problem-solving abilities.
  • Proven ability to work with multiple groups across different sites and time zones.

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