Senior Analog Mixed-Signal Verification Lead

1 day ago


Thāne, Maharashtra, India beBeeVerification Full time ₹ 30,00,000 - ₹ 40,00,000

Job Opportunity

We are seeking a seasoned Verification Engineer to lead our analog/mixed-signal verification efforts. This is an exciting opportunity for a technical expert to plan, develop, and execute AMS verification strategies for complex IPs and SoCs.

Key Responsibilities:

  • Develop and maintain advanced SystemVerilog, Verilog-AMS or UVM-based verification environments for mixed-signal designs.
  • Collaborate with cross-functional teams to perform co-simulation of analog/digital designs using industry-standard tools like Cadence, Synopsys, and Siemens EDA.
  • Conduct in-depth analysis and debugging of complex AMS simulation issues across multiple abstraction levels.
  • Drive coverage analysis and sign-off using functional, formal, and assertion-based methods.
  • Provide technical guidance and mentor junior engineers in best practices and methodologies.

Requirements:

  • 8+ years of hands-on experience in AMS verification for IP/SoC projects.
  • Strong background in mixed-signal simulation, behavioral modeling, and digital design.
  • Proven track record in building verification environments using SystemVerilog, Verilog-AMS, or UVM.
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.


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