Senior Analog Layout Design Engineer
4 weeks ago
Cadence Design Systems, Inc. is seeking a highly skilled Senior Analog Layout Design Engineer to join our team.
Job Summary:
We are looking for a talented Analog Layout Design Engineer to work on cutting-edge FinFET technologies. The ideal candidate will have hands-on experience in various analog IP like Opamps, Bandgaps, Dataconverters, LDO and PLL etc.
Responsibilities:
- Design and develop high-speed analog and mixed-signal SerDes IP for Tier-1 customers.
- Understand layout effects on the circuit such as speed, capacitance, power and area etc.
- Apply various analog layout techniques like matching, shielding etc.
- Collaborate with cross-functional teams to develop and implement new technologies.
Requirements:
- Hands-on layout experience in various analog IP like High speed Analog (Serdes), Data converters, power management and PLL etc.
- Good understanding of DSM technology methodology, issues etc.
- Having worked on latest technology nodes, 28nm and below, is desired.
- Must have good communication skills and should be a team player.
- Scripting and automation experience is a plus.
About Us:
Cadence Design Systems, Inc. is a leading provider of electronic design automation (EDA) software and services. We are committed to helping our customers design and develop innovative products that make a difference in the world.
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Senior Analog Layout Engineer
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