Senior Design Verification Engineer Lead
3 weeks ago
We are seeking a seasoned Senior Design Verification Engineer Lead to join our team at Texas Instruments. This role involves driving verification strategy, creating Test Plans, and developing Test Benches for Chip Top.
About the JobThis position offers an exciting opportunity to be part of the best custom semiconductor team in the world. As a Senior Design Verification Engineer Lead, you will play a key role in delivering industry-leading custom IC system solutions.
The successful candidate will have experience with GLS setup, Chip Top Level DV signoff using FV (Formal verification), and Top Level DV signoff using SV & UVM. They should also be able to automate tasks using perl or python and have excellent debugging and problem-solving skills.
Responsibilities- Develop and implement verification strategies for Chip Top.
- Create comprehensive Test Plans and develop Test Benches.
- Collaborate with cross-functional teams to ensure successful product development.
- Achieve 100% code coverage (Block, expression, FSM) in IP DV.
- Interact with Product Engineering and Application Engineering teams to characterize IO timing on Silicon and ensure successful use of products in the marketplace.
- 4-10 years of experience in IP DV, SoC DV, and post-silicon debug.
- Experience in Cadence simulation tools.
- Strong understanding of standard protocols (e.g., I2C, SPI, UART).
- Excellent communication and teamwork skills.
$120,000 - $180,000 per annum, depending on location and experience.
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