Chief Silicon Hardware Design Architect

3 weeks ago

Noida, Uttar Pradesh, India Microsoft Full time

About the Role

Microsoft's Cloud Compute Development Organization (CCDO) is seeking highly skilled and experienced engineers to join our silicon hardware physical design team. The successful candidate will be responsible for delivering cutting-edge, custom IP and SOC designs that can perform complex and high-performance functions in an efficient manner.

Responsibilities

  • Demonstrate technical expertise in all aspects of Physical Design, from synthesis to place and route of partitions through all signoff including timing signoff, physical verification, EMIR signoff, Formal Equivalence, and Low Power Verification.
  • Own complete PD execution of Sub-systems/Sub-chips instantiating multiple other Physical partitions.
  • Own partition floorplanning for optimizing blocks for Power, Performance and Area.
  • Collaborate with RTL team to drive and resolve design issues related to block closure.
  • Understand tools, flows, and overall design methodology in design construction, signoff, and optimization with a data driven approach.
  • Implement robust clock distribution solutions using appropriate methods that meet design requirements.
  • Making good independent technical trade-offs between power, area, and timing (PPA).
  • Guide and coordinate with all sub-partitions PD to take the Sub-chip through PD (construction through signoff) closure.
  • Partner closely with PD flow/CAD team and PD methodology team to flag and fix PD TFM issues upfront.

Requirements

  • BS/MS in Electrical or Computer Engineering.
  • 10+ years of experience in semiconductor design.
  • Great communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams.
  • Proven track record of implementing designs through synthesis, floorplanning, place and route, extraction, timing, and physical verification.
  • Large SoC/CPU/IP design tape-out experience in the latest foundry process nodes.
  • Excellent project management skills and ability to juggle multiple projects at once.
  • Strong understanding of constraints generation, STA, timing optimization, and timing closure.
  • In-depth understanding of design tradeoffs for power, performance, and area.

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