
Advanced Analog Layout Designer
1 week ago
Job Title: Advanced Analog Layout Designer
We are seeking an experienced analog layout engineer to design and implement high-quality layouts for advanced CMOS processes.
About the Role:
- The successful candidate will be responsible for designing and implementing high-quality layouts for advanced CMOS processes.
- Duties include creating and verifying layouts using Cadence VLE/VXL, PVS, Assura, and Calibre DRC/LVS tools.
- Candidates should possess expertise in critical analog layout design of blocks such as temperature sensors, serdes, PLLs, ADCs, DACs, LDOs, bandgap references, charge pumps, current mirrors, comparators, and differential amplifiers.
- Responsibilities also include analyzing and understanding design constraints to implement high-quality layouts.
- An added advantage is supporting multiple tape-out experiences.
Requirements:
- 4+ years of experience in analog/custom layout design in advanced CMOS processes, with 2+ years of FinFet experience.
- Expertise in Cadence VLE/VXL, PVS, Assura, and Calibre DRC/LVS is mandatory.
- A good understanding of analog layout fundamentals, including matching, electro-migration, latch-up, coupling, cross-talk, IR-drop, and active and passive parasitic devices.
What We Offer:
We provide a dynamic work environment and opportunities for growth and development. If you are a motivated and detail-oriented individual with a passion for analog layout design, we encourage you to apply for this exciting opportunity.
This position offers the chance to work on challenging projects that require creativity and analytical thinking.
You will have the opportunity to develop your skills in analog layout design and expand your knowledge of advanced CMOS processes.
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