
Advanced Verification Engineer
7 days ago
Verification Engineering Role
">At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud.
">As a Senior Engineer in Design Verification Engineering, you will play a key role in ensuring the reliability and performance of complex test-bench/models in Verilog, System Verilog, or SystemC.
">Key Responsibilities:
">- ">
- Design and develop test-bench models for complex systems">
- Collaborate with cross-functional teams to ensure seamless integration of designs">
- Develop and maintain comprehensive verification plans and reports">
- Stay up-to-date with industry trends and emerging technologies">
Requirements
">To succeed in this role, you will need:
">Technical Skills
">* Experience with Verilog, System Verilog, or SystemC
">* Knowledge of OVM/UVM methodology
">* Proficiency in C/C++, Perl/Shell script, and assembly language
">* Strong understanding of SoC/IP performance verification
">Desirable Qualifications
">* Experience with x86 or ARM domain-based SOCs
">* Familiarity with PLI/DPI interface
">What We Offer
">At ACL Digital, you will have the opportunity to work on challenging projects, collaborate with talented engineers, and contribute to the growth of our organization.
">We are committed to providing a supportive and inclusive work environment that fosters creativity, innovation, and teamwork.
">Let's Work Together
">We look forward to hearing from you and exploring how your skills and experience can contribute to our success.
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