Network On Chip Verification Specialist

20 hours ago

Hyderabad, Telangana, India beBeeVerification Full time ₹ 20,00,000 - ₹ 25,00,000
Network on Chip Verification Specialist

We are seeking a highly skilled Network on Chip verification specialist to lead and contribute on the verification of complex digital design blocks.

  • Lead and plan verification of complex digital design blocks by fully understanding the architecture and design specifications.
  • Interact with architects and design engineers to create a comprehensive verification test plan that ensures the delivery of functionally correct design blocks.
  • Design and architect testbenches in System Verilog and UVM to complete verification of the design in an efficient manner, identifying and writing coverage measures for stimulus quality improvements.
  • Debug tests with design engineers to deliver high-quality verification results.
  • Perform coverage analysis to identify verification holes and achieve closure on coverage metrics.

Preferred experience includes:

  • Development of UVM, OVM, VMM and/or System Verilog, Verilog testbenches and usage of simulation tools/debug environments like Synopsys VCS, Cadence IES to test block level/full chip SOCs and FPGAs.
  • Strong understanding of state-of-the-art verification techniques, including assertion and coverage-driven verification.
  • Strong understanding of different phases of ASIC and/or full custom chip development is required.
  • Experience in block-level NOC (Network on Chip) verification is a plus.
  • Verification experience in protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus.
  • Experience as a verification architect, establishing the verification methodology, tools, and infrastructure for high-performance FPGAs, SOCs, and/or VLSI designs is a plus.
  • Experience with gate-level simulation, power verification, reset verification, contention checking, abstraction techniques is a plus.
  • Familiarity with verification management tools as well as understanding of database management particularly as it pertains to regression management is a plus.
  • Experience with formal property checking tools such as Cadence (IEV), Jasper, and Synopsys (VC-Formal, Magellan) is a plus.

Academic credentials include:

  • Bachelor's or Master's degree in computer engineering/Electrical Engineering.

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