
Design Verification Engineer Opportunity
6 days ago
Design Verification Engineer Opportunity
">We are seeking a highly skilled Design Verification Engineer to join our team. As a key member of our engineering team, you will be responsible for designing and implementing verification plans for complex digital and mixed-signal systems.
">Key Responsibilities:
">- ">
- Develop and implement verification plans and testbenches for digital and mixed-signal systems.">
- Collaborate with cross-functional teams to identify and prioritize verification requirements.">
- Analyze and debug design issues using various tools and techniques.">
- Provide technical guidance and support to junior engineers and peers.">
- Maintain and improve verification environments and tools.">
Requirements:
">- ">
- 4+ years of experience in design verification or related field.">
- Strong knowledge of digital and mixed-signal system design and verification principles.">
- Familiarity with industry-standard verification languages (e.g., SystemVerilog, UVM).">
- Proficiency in simulation and analysis tools (e.g., VCS, NCVER, ModelSim).">
- Excellent problem-solving skills and attention to detail.">
- Candidates with experience in CPU, AMS, SOC, UPF, JTAG, PCIe, UCIe, CXL, USB, DDR, SerDes, MIPI, Ethernet, Python, Power Aware technologies preferred.">
What We Offer:
">- ">
- Opportunities for growth and professional development.">
- A dynamic and supportive work environment.">
- Competitive salary and benefits package.">
- The chance to work on cutting-edge projects with a talented team.">
Location:
">Bangalore / Hyderabad / Noida / Ahmedabad / Pune
">Notice Period:
">Less than 45 days
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