
Senior Physical Design Specialist
5 days ago
Physical Design Engineer
About the Role:This position involves all aspects of physical design for full-chip/block-level implementation, including floorplanning, placement, budgeting, clock tree planning & analysis, scan re-ordering, clock tree synthesis, placement optimizations, routing, timing and SI analysis/closure, ECO tasks (both timing and functional), EM/IR, DRC, LVS, ERC analysis & fixes, low power solution development & implementation.
Required Skills and Qualifications:- Strong knowledge in EDA tools such as DC, ICC2, Cadence Innovus, STAR-RC, PT-SI, Verplex, Quartz, Calibre, internal tools & flow, etc.
- Experience with block implementation, extraction, timing and/or full-chip designs
- Proficient in Unix/TCL/Perl
- Good communication and presentation skills. Requires good interpersonal skills and problem-solving ability.
- 4+ years experience in ASIC physical design
- Must have prior experience with Synopsys/Cadence/Mentor place and route tools.
- Must have completed design in 16nm and/or 7nm.
We are looking for a motivated and experienced physical design engineer to join our team. The successful candidate will be responsible for all aspects of physical design for full-chip/block-level implementation. This is an excellent opportunity for someone who wants to work on complex chip designs and contribute to the success of our company.
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