Senior Design Verification Specialist
10 hours ago
We are seeking an experienced verification engineer to join our team. In this role, you will be responsible for designing and verifying complex digital systems.
Key Responsibilities:- Design and develop testbenches and checkers using Verilog or SystemVerilog.
- Collaborate with cross-functional teams to ensure successful project delivery.
- Develop and maintain verification environments and tools.
- Identify and report bugs and errors in the design.
- Work closely with hardware engineers to resolve issues related to hardware-software interfaces.
Proven experience in functional verification of digital systems, including SoC and IP verification.
Expertise in Verilog, SystemVerilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language.
Strong understanding of OVM/UVM methodology and its application in verification environments.
Excellent communication and teamwork skills.
Benefits:Competitive salary and benefits package.
Opportunity to work on cutting-edge technologies and projects.
Collaborative and dynamic work environment.
Others:Preferably having experience in architecture such as x86 or ARM domain based SOCs.
Having SOC/IP performance verification background is an added plus.
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