
Static Timing Analysis Expert Lead
1 week ago
Job Opportunity:
We are seeking a highly skilled Static Timing Analysis Lead to join our team. The ideal candidate will have extensive experience in static timing analysis and be responsible for leading the development of prime time constraints, multimode multi-corner timing knowledge, and top-level timing closure.
Main Responsibilities:
- Develop prime time constraints at full chip level and ensure clean-up is performed efficiently.
- Create multimode multi-corner timing knowledge and timing closure at sub HM/block/top level.
- Implement top-level timing closure with sign-off STA in MMMC, considering Xtalk and OCV.
- Develop ECO implementation strategies for netlist, RTL, and timing level changes.
- Familiarity with scripting languages such as Perl/TCL is required.
- Excellent debugging skills are necessary to address implementation issues and develop creative solutions.
- Familiarity with technologies from 28nm and below is essential.
- A minimum of 8+ years of experience in STA and timing constraints expertise is required.
- Proficiency in Primetime or Tempus tools is preferred.
Key Qualifications:
- Minimum 8+ years of experience in STA and timing constraints.
- Strong understanding of static timing analysis principles.
- Experience with Perl/TCL scripting.
- Excellent debugging and problem-solving skills.
- Familiarity with technologies from 28nm and below.
- Ability to work independently and as part of a team.
About the Role:
The successful candidate will possess excellent leadership skills, strong technical expertise, and the ability to work effectively in a team environment. If you are a motivated and experienced Static Timing Analysis professional looking for a new challenge, please apply now.
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