
Senior ASIC Design Verification Expert
4 days ago
We are seeking a skilled Design Verification expert to develop and implement verification plans, test benches, and functional tests to ensure the quality and functionality of our designs.
The successful candidate will have hands-on experience in UVM methodology and C/C++ based verification, as well as expertise in architecting and implementing Design Verification infrastructure. You will work closely with our design team to debug and resolve functional failures, and contribute to the development of UVM based verification environments from scratch.
Key Responsibilities:- Develop and implement verification plans, test benches, and functional tests.
- Collaborate with design team to debug and resolve functional failures.
- Contribute to the development of UVM based verification environments.
Requirements and Qualifications:
- Bachelor's or Master's degree in Computer Science, Electronics Engineering, or equivalent practical experience.
- 8/10+ hands-on experience in UVM methodology and/or C/C++ based verification.
- Experience in IP/sub-stem and/or SoC level verification based on UVM/OVM methodologies.
- Expertise in E tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments.
- Experience with revision control systems like Mercurial, Git or SVN.
- Familiarity with protocols like AMBA, PCIe, DDR, USB, Ethernet.
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