Senior Fabric Verification Engineer

2 weeks ago


Bengaluru, Karnataka, India Mulya Technologies Full time

We are seeking an experienced Senior Fabric Verification Engineer to join our team at Mulya Technologies in Bangalore. As a key member of our engineering team, you will play a crucial role in the development and verification of high-end server processors.

Estimated salary for this position is around ₹20 lakhs per annum, depending on experience and qualifications.

About the Job

In this role, you will be responsible for leading the development of verification plans, environments, testbenches, and writing test cases for the Cache Coherency Transport Interconnect Fabric in Server Processors.

You will work closely with design teams and other stakeholders to debug and fix logic design issues and deliver quality designs.

Your Responsibilities

  • Develop skills in Functional verification tools and methodologies.
  • Work with development teams to ensure coverage criteria is met.
  • Collaborate with design teams to identify and resolve logic design issues.

Requirements

  • 9+ years of experience in Functional Verification of processors or ASICs.
  • 3+ years of experience in Computer architecture knowledge.
  • Multi-processor Cache Coherency Transport/Network on Chip/Memory Hierarchy verification expertise.
  • AXI/AHB/ACE/ACE-lite/CHI/On Chip System Fabric interface verification or any other Processor/SoC coherency transport interconnect fabric verification.
  • Knowledge of performance parameters of On Chip Coherency Transport Network designs and ways to stress verify them.
  • Minimum one full life cycle leadership experience of a processor/SoC verification flow with focus on Coherency Transport Interconnect and/or Network on Chip Verification.
  • Good object-oriented programming skills in C++/SystemVerilog, scripting languages like Python/Perl.
  • Verification knowledge in Clock domain crossing and reset domain crossing.
  • Knowledge of functional verification methodology like UVM/OVM.
  • Knowledge of HDLs (VHDL/Verilog).
  • Developed test plans and test strategies for IP/unit/block level verification of Coherency Transport Interconnects.
  • Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow.
  • Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails.
  • Experience in driving verification coverage closure including performance testing, stress testing and ability to identify corner case scenarios.

About Mulya Technologies

Mulya Technologies is a Fortune 100 Organization that values innovation and excellence. We offer a collaborative work environment, opportunities for growth and development, and a competitive salary package.



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