Sr. DFT Architecture Developer
2 days ago
This position requires a seasoned professional with expertise in designing and implementing Digital Fault Tolerance (DFT) architectures for complex ASIC/SoC designs.
The successful candidate will play a key role in developing and integrating DFT features into our designs, ensuring seamless integration with RTL and physical design teams.
Responsibilities include:
- Designing and implementing DFT architectures for ASIC/SoC designs
- Collaborating with cross-functional teams to ensure timely delivery of high-quality designs
- Generating and validating test patterns using ATPG tools for stuck-at, transition, and path delay faults
- Performing fault simulation and coverage analysis to optimize test quality
- Supporting silicon bring-up and debug of test-related issues
- Working with ATE teams to develop test programs and support production testing
Required Skills and Qualifications:
- Bachelor's degree in Electrical Engineering or Computer Science
- Minimum 5 years of experience in DFT architecture development
- Strong knowledge of digital circuit design and verification
- Excellent collaboration and communication skills
- Ability to work in a fast-paced environment
Benefits:
- Competitive salary and benefits package
- Ongoing training and professional development opportunities
- Collaborative and dynamic work environment
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