Chief Design Verification and Test Engineer

4 days ago


Agra, Uttar Pradesh, India beBeeDftEngineer Full time ₹ 1,20,00,000 - ₹ 2,50,00,000

Senior DFT Engineer Role Overview

The position involves expertise in test mode timing constraints definition, scripting languages such as perl and shell, and RTL and Gate level simulations of scan and MBIST test vectors.

A strong understanding of equivalence check and DFT DRC rules is essential. The ideal candidate should possess excellent problem-solving skills, communication and teamwork skills, and good English proficiency.

Working experience in Synopsis TetraMax/DFTMax and Cadence Encounter Test is a plus. Ability to learn and adapt to new tools and methodologies is required.

Key Responsibilities:

  • Develop and implement efficient DFT strategies for complex designs.
  • Collaborate with cross-functional teams to ensure seamless integration of DFT concepts into the design process.

Required Skills and Qualifications:

  • In-depth knowledge of DFT concepts, including scan insertion, ATPG, coverage analysis, and transition delay test coverage analysis.
  • Expertise in scripting languages, such as perl and shell.
  • Strong understanding of RTL and Gate level simulations of scan and MBIST test vectors.
  • Ability to work in an international team environment and communicate effectively with colleagues.

Benefits:

  • Opportunity to work on cutting-edge projects with experienced professionals.
  • Chance to develop and enhance technical skills through continuous learning and training.


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