Electronics Design Verification Engineer
1 day ago
Cadence Design Systems is a leader in electronic design, building on over 30 years of computational software expertise. Our Intelligent System Design strategy enables us to deliver software, hardware, and IP that bring design concepts to life. Our customers are innovative companies creating extraordinary electronic products for diverse applications.
The Cadence Advantage
We offer a unique work environment that fosters creativity, innovation, and growth. Our employee-friendly policies focus on physical and mental well-being, career development, and learning opportunities. Our "One Cadence – One Team" culture promotes collaboration across teams to ensure customer success.
Responsibilities
- Develop test plans, tests, and verification infrastructure for complex IPs/sub-systems/SOCs
- Design verification environments using UVM methodology or equivalent
- Implement reusable bus functional models, monitors, checkers, and scoreboards
- Apply functional coverage driven verification closure techniques
Requirements
- BTech/MTech in Engineering
- 5-15 years of VLSI industry experience in Verification
- Expertise in developing test benches/test cases using SV & UVM
- Strong individual contributor and mentorship experience
- Working knowledge of verification cycles for complex IPs/SOCs
- Experience with code coverage, functional coverage, and assertions (desired)
- Bus protocols (AXI/AHB/APB)
Cadence Design Systems is an ideal place for talented individuals to grow and make an impact in the electronics design industry.
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