Senior Verification Expert
3 days ago
Job Description:
As a Senior Verification Engineer, you will play a key role in ensuring the functionality and quality of our next-generation integrated circuits (ICs). This position offers the opportunity to work on challenging projects while utilizing your expertise in verification methodologies and tools. Your primary responsibility will be to develop and implement comprehensive verification plans using industry-standard methodologies (e.g., UVM).
- Develop and implement robust verification environments (testbenches) to achieve high code coverage.
- Utilize simulation tools (e.g., ModelSim, Cadence Incisive, Synopsys VCS) to verify RTL functionality.
- Debug and analyze verification failures to identify the root cause of design issues.
- Collaborate with RTL design engineers to resolve functional bugs and ensure design revisions meet verification requirements.
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree a plus).
- 10+ years of experience in design verification for ASICs or SoCs.
- Strong understanding of digital design principles (combinational logic, sequential logic).
- Proven ability to develop and debug complex verification environments.
- Proficiency in Verilog or VHDL with experience in verification methodologies (e.g., UVM).
- Experience with simulation tools and scripting languages (e.g., Python, Perl) is a plus.
Competitive salary and benefits package.
Opportunity to work on leading-edge technologies and projects.
Collaborative and dynamic work environment.
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