Validation Memory Design Lead
5 days ago
We are seeking a highly skilled Validation Memory Design Lead to join our team at Nexlance.
As a key member of our memory design team, you will be responsible for contributing towards memory design validation of SRAM, Multi-Ports, Register File, TCAM, and ROM memory compilers as well as custom macros in 3nm and other cutting-edge process technologies.
Key Responsibilities:
- Contribute towards memory design validation of all types of custom memory macros and memory compilers.
- Perform functional verification, root cause design discrepancies, and help resolve them.
- Perform signal integrity analysis, identify design weaknesses, and propose possible solutions to address them.
- Perform transistor level simulations to check for any Power Up or Lock up issues and help resolve them.
- Perform EM/IR analysis/simulations and evaluate impact on timing and internal margins.
- Perform transistor level simulations to validate timing and internal margins, identify timing characterization holes, and help resolve them.
- Perform various QA and validation checks to ensure accurate timing and power models.
- Develop scripts to automate verification flow and data analysis.
- Support silicon debugs and correlation to spice models.
- Coordinate with memory design leads, modelling leads, and managers to define and execute on the memory validation plan.
To be successful in this role, you will need:
- Strong expertise in development of memory macros of all types and architectures.
- Strong understanding of transistor level circuit behavior and analysis.
- Good understanding of the layout and their related challenges in sub-nanometer process technologies.
- Good understanding of signal integrity, EM/IR, and reliability analysis.
- Good understanding of memory behavioral and physical models.
- Good understanding of DFT Schemes and chip level integration.
- Proficient in running transistor level simulators, writing automation scripts, and are tools savvy.
- Complete hands-on experience in using Cadence schematic/layout editor tools.
- Complete hands-on experience with transistor level simulators, Monte Carlo variation analysis, waveform viewer tools such as; HSPICE, HSIM, XA, FineSim, XARA, nWave, waveform viewer, etc.
- Experience in Skill/Perl/Python Scripting is a strong plus.
- Good communication, interpersonal, and leadership skills.
- Good debugging skills, problem-solving and logical reasoning skills.
- Motivated, self-driven and good at multi-tasking.
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Validation Engineer
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Memory Design Validation Engineer
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Bangalore, India Nexlance Full timeWe are seeking a skilled Memory Design Validation Engineer to contribute to the development of memory compilers and custom macros in cutting-edge process technologies.Key Responsibilities: Perform functional verification and root cause design discrepancies Conduct signal integrity analysis and propose solutions to address design weaknesses Perform transistor...
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