Chief Digital Verification Expert

6 days ago

Nashik, Maharashtra, India beBeeDftEngineer Full time ₹ 5,00,000 - ₹ 10,00,000
Lead DFT Engineer Job Description

We are seeking a skilled Lead DFT Engineer to drive the development of complex ASIC and SoC designs.

The successful candidate will have a strong background in digital signal processing and verification techniques, with expertise in design for test (DFT) strategies and architectures.

Key Responsibilities:

  • Define and implement DFT strategy and architecture for multiple projects
  • Lead the implementation and verification of DFT features such as scan insertion and compression, ATPG pattern generation and fault grading, MBIST and Logic BIST insertion and validation, boundary scan (IEEE 1149.1/1149.6), IJTAG (1687)
  • Manage end-to-end DFT flow from RTL to gate-level netlist and silicon bring-up
  • Collaborate with RTL, STA, PD, and test engineering teams for seamless integration
  • Perform pattern generation, fault simulation, and debug test coverage gaps
  • Own DFT signoff, timing closure (DFT-related paths), and ATE pattern delivery
  • Support silicon bring-up, test vector validation on ATE, and yield optimization
  • Mentor and guide junior DFT engineers; conduct design reviews and training sessions

Requirements:

  • Bachelor's or Master's degree in Electronics, Electrical, or VLSI Design
  • At least 7 years of experience in DFT for complex ASIC or SoC designs
  • Expertise in scan insertion, compression, ATPG, MBIST, and boundary scan
  • Hands-on experience with DFT tools such as Synopsys: DFT Compiler, Tetra MAX, Test MAX, Siemens EDA: Tessent Scan Pro, MBIST, IJTAG, Cadence/others: Modus, Encounter Test
  • Strong knowledge of RTL design, STA, and synthesis flows
  • Proficient in scripting languages (Python, Perl, Tcl) for flow automation
  • Deep understanding of silicon test challenges and test coverage improvement
  • Strong leadership, team collaboration, and communication skills

Location: Nashik, India

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