
Senior Verification Engineer Role
2 weeks ago
We are seeking a highly skilled verification engineer to join our team.
- Key Responsibilities:
- Design and develop verification environments using SV/UVM or SOC Verification using C/SV.
- Integrate VIP components into the verification environment.
- Develop and implement interconnect protocols such as AHB, AXI, APB.
- SOC interfaces including GPIO, SPI, I2C, UART (3+).
- High-speed serial interfaces like PCIe Gen 3/4, USB, MIPI, UPF, DDR.
- Closure of coverage for code, functional, and toggle tests.
- Utilize tools like Synopsys VCS or Cadence Incisive.
- Prepare technical documentation including testbench specification and test plan specification.
- Familiarity with scripting skills such as Perl, Python, Shell, TCL.
- Degree in Electronics Engineering is a minimum requirement; Masters in Electronics or Computer Science Engineering is an added advantage.
- Minimum 7 years of experience in design verification engineering.
- Excellent communication skills both written and oral.
- Attitude to learn and adaptability.
Our company offers a competitive salary and comprehensive benefits package.
We prioritize work-life balance and provide opportunities for professional growth and development.
The ideal candidate will be highly motivated and have excellent problem-solving skills.
How to ApplyTo apply for this position, please submit your resume and cover letter.
We look forward to reviewing your application.
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