RTL Design Engineer
4 weeks ago
Experience: 5 to 15 Years
Job Location: Bangalore.
Notice Period - 0 to 90 days (30 days np will be preferred 1st)
Key Responsibilities:
- Hands on in SoC level RTL Design
- Hands on in Clock Domain Crossing (CDC) checks, Spyglass, Linting, equivalence checks
- Experience in Digital module Integration, micro-architecture and design
- Experience in basic RTL simulation
- Good knowledge of Synthesis, STA and DFT aware design
Requirements:
- 5 to 15 years of experience in digital circuit design
- Hands on experience in SoC level RTL design
- Expertise in digital module integration
- Good knowledge of synthesis, static timing analysis and DFT aware design
How to Apply:
Candidates who meet the above requirements can send their updated resume at jyothipraveen@mirafra.com
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