Senior PDK Development Engineer

3 weeks ago


Hyderabad, Telangana, India Cadence Design Systems, Inc. Full time

PDK Development and CAD Enablement Expertise


We're seeking a highly skilled PDK Development and CAD Enablement Expert to join our team at Cadence Design Systems, Inc.


The ideal candidate will have a strong background in PDK development, CAD enablement, and physical verification tools.


Key Responsibilities:



  • Develop and integrate foundry rule decks and technology files to support PDKs
  • PDK QA, verification, and release methodology for decks and specialized setups
  • Responsible for physical verification methodology, including installation, development, qualification, automation, and support
  • Ensure QA of integrated PDKs with custom design environment
  • General tool usage support, real-time support of all tools, creating bug workarounds, and filing CCRs with R&D
  • Responsible for rule deck development to implement process design rules into physical verification rules decks and QC for the rule decks
  • Interface with design teams and foundry team to develop and verify PDKs
  • Develop, own, and maintain automation framework for efficiency improvement perspective for the design environment

Requirements:



  • Bachelor's Degree in Electrical/Electronic Engineering or equivalent
  • 4-7 years of work experience in PDK development and CAD enablement
  • Expertise in Cadence Python, SKILL, Perl programming languages
  • Knowledge of deep sub-micron CMOS processes, device physics, and layout design
  • Experience with Cadence custom IC Virtuoso platform to create layout test structures, validate verification rules, and troubleshoot errors
  • Experience in developing PDK device library components and definitions, including SKILL parameterized cells (Pcell), symbols, CDF, callbacks, simulation/netlisting
  • Experience with physical verification tools for DRC, LVS, and parasitic extraction, Cadence PVS, Assura is a plus
  • Working knowledge of revision control software (Git, sos, Subversion, Synchronicity, etc)
  • Understanding of Pcell creation and enhancements to Pcell parameters, device callbacks, etc is a plus
  • Excellent technical problem-solving skills
  • Excellent communication and presentation skills

We're doing work that matters. Help us solve what others can't.


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