SOC Verification Engineer
19 hours ago
🔹 Job Title: SoC GLS Engineer (Gate-Level Simulation) – UVM Expertise Required🔹 Location: Bangalore / Noida🔹 Notice Period: Immediate Joiners OnlyJob DescriptionWe are looking for an experienced SoC GLS (Gate-Level Simulation) Engineer with strong hands-on expertise in UVM-based verification. The ideal candidate will have deep understanding of SoC design flows, GLS methodologies, SDF handling, debugging, and sign-off processes. This role requires the ability to work in a fast-paced environment, collaborate with cross-functional teams, and ensure high-quality verification and GLS sign-off.Key ResponsibilitiesPerform Gate-Level Simulations (GLS) for complex SoC designs including SDF annotation, debug, and sign-off.Develop, enhance, and maintain UVM testbenches for GLS environments.Run GLS regressions, analyze failures, and deliver high-quality debug reports.Work closely with RTL, STA, PD, and DFT teams to resolve timing, CDC, and initialization issues.Ensure testbench readiness, coverage closure, and alignment with verification plans.Support tape-out activities with rigorous GLS checks and validation procedures.Required Skills & Experience4 – 15+ years of experience in SoC verification and GLS.Strong hands-on experience in UVM, SystemVerilog, and functional verification methodologies.Deep knowledge of GLS flows, simulation debugging, and SDF annotation.Experience with industry-standard simulators (VCS, NCSim, Xcelium, Questa, etc.).Good understanding of RTL-to-GDSII flow, STA interactions, and clock/reset architectures.Ability to work independently and drive GLS sign-off.Preferred SkillsExperience with low-power verification, UPF, and CDC analysis.Familiarity with scripting languages (Python/Perl/Shell) for automation.Exposure to SoC integration and IP-level GLS.Why Join Us?Opportunity to work on cutting-edge SoC programs.High-impact role with major contribution to tape-out.Collaborative and growth-oriented work culture.📞 Contact DetailsPrabhu PPhone: 8754387484Email: prabhu.p@acldigital.comACL Digital – Semiconductor Division
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SoC Verification Engineer
1 week ago
Bangalore, India ScaleFlux Full timeVerification Lead Engineer Join the India team of most cutting-edge and well-funded storage startup in Silicon Valley as the Lead Verification Engineer taking on IP and SoC level verification challenges. As a Verification Lead with a focus on verification of Multi-core, complex, high performance ASIC, you will work to understand the internal requirements and...
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SoC Verification Engineer
4 days ago
bangalore, India ScaleFlux Full timeVerification Lead EngineerJoin the India team of most cutting-edge and well-funded storage startup in Silicon Valley as the Lead Verification Engineer taking on IP and SoC level verification challenges.As a Verification Lead with a focus on verification of Multi-core, complex, high performance ASIC, you will work to understand the internal requirements and...
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SOC Verification Engineer
3 days ago
bangalore, India ACL Digital Full timeJob Title: SoC GLS Engineer (Gate-Level Simulation) – UVM Expertise Required Location: Bangalore / Noida Notice Period: Immediate Joiners OnlyJob DescriptionWe are looking for an experienced SoC GLS (Gate-Level Simulation) Engineer with strong hands-on expertise in UVM-based verification. The ideal candidate will have deep understanding of SoC design...
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SoC Verification Engineer
19 hours ago
bangalore district, India ScaleFlux Full timeVerification Lead Engineer Join the India team of most cutting-edge and well-funded storage startup in Silicon Valley as the Lead Verification Engineer taking on IP and SoC level verification challenges. As a Verification Lead with a focus on verification of Multi-core, complex, high performance ASIC, you will work to understand the internal requirements and...
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SOC Verification Engineer
1 day ago
Bangalore, India ACL Digital Full timeJob Title: SoC GLS Engineer (Gate-Level Simulation) – UVM Expertise Required Location: Bangalore / Noida Notice Period: Immediate Joiners Only Job Description We are looking for an experienced SoC GLS (Gate-Level Simulation) Engineer with strong hands-on expertise in UVM-based verification . The ideal candidate will have deep understanding of SoC design...
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IP/SOC Verification Engineer
3 weeks ago
bangalore, India ACL Digital Full timeJob Title: IP/SS/SoC Verification Engineer (Hybrid – Bangalore / Hyderabad) Experience: 4 to 15+ years Notice Period: Strictly less than 30 days Work Type: Hybrid Location: Bangalore / Hyderabad Job Description We are looking for talented SoC Verification Engineers with strong expertise in SystemVerilog/UVM , solid debugging skills, and a deep...
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Design Verification Engineer SOC
23 hours ago
bangalore, India Best NanoTech Full timeAbout the RoleThe role requires a highly skilled verification engineer with a strong background in SoC-level verification. The candidate will be responsible for ensuring the quality and functionality of our ARM-based products through rigorous testing and validation processes.ResponsibilitiesMinimum 5 years of relevant experience in verification, preferably...
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SOC Design Verification Engineer
2 weeks ago
Bangalore, India ACL Digital Full timeSOC Verification engineer: Years of Relevant Experience: 4+ years Location: Bangalore 1. Should have worked on SOC level verification. 2. Should have good understanding of coding testcase in C or X86. 3. Should have good understanding of ARM subsystem. 4. Good hands on experience on UVM is must. 5. Peripherals like PCIE Gen6/Gen5, USB2.0/3.0, Ethernet, low...
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Senior Verification Engineer
1 week ago
bangalore, India beBeeVerification Full timeJob TitleSenior Verification Engineer - SoC DesignAs a Senior SoC Design Verification Engineer, you will be responsible for leading the development and execution of comprehensive verification strategies to ensure the quality and reliability of complex ASIC designs.Key ResponsibilitiesDesign and implement verification environments using System Verilog and UVM...
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Lead SoC Verification engineer
3 weeks ago
bangalore, India Eteros Technologies Full timeEteros Technolgies is Seeking a Senior/ Lead Verification Engineer with strong expertise in simulation environment migration, debugging, and coverage analysis . The role involves migrating IP and SoC-level verification environments between Cadence Xcelium and Synopsys VCS , ensuring simulation stability, functional correctness, and coverage closure for...
