Staff, Design Verification
2 weeks ago
We're looking for a passionate and hands-on RISC-V CPU Cluster/SoC DV Engineer to architect, develop, and evolve world-class verification infrastructure for high-performance RISC-V CPU clusters. If building from scratch, innovating on methodology, and collaborating with top-tier CPU designers excites you — read on.This role is hybrid, based out of Bangalore.We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this postingWho You Are- You thrive in building robust verification environments using SystemVerilog, UVM and C++, and can define and drive verification plans independently.- You bring a system-level mindset, with experience integrating multiple IPs into clusters or SoCs and verifying their interactions.- You have a strong grasp of stimulus planning, debug techniques, and coverage closure for verifying complex hardware subsystems like caches, NoCs, and memory hierarchies.- You're comfortable working on features that span multiple IPs — such as coherence, security — and ensuring their correct behavior at the cluster or SoC level.What We Need- A Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field.- 5- 12 years of Strong experience with System Verilog and UVM-based verification.- Proven ability to drive subsystem or SoC-level DV projects with integration and system feature validation responsibilities.- Familiarity with AXI/CHI protocols, System IPs flows (like debug/trace, power management), and integration flows for multi-IP verification environments.What You Will Learn- Techniques to scale DV infrastructure for verifying high-performance RISC-V clusters and SoCs.- How to verify multi-agent interactions across CPUs, system IPs and NoC or fabric components.- Best practices for cross-IP feature convergence, integration-level planning, and reuse across cluster/SOC programs.- How to collaborate with global teams across RTL, DV, software, and validation for cohesive system-level bring-up.
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Staff Design Verification
4 days ago
bangalore, India Analog Devices Full timeJob Responsibilities:Verification of complex designs such as accelerators/ datapath IP, processor core subsystems, complex interfaces/ protocols such as DDR/ Ethernet/ USB etc using leading edge methodologies like UVM & Formal DVArchitect the testbench and develop the verification environment in UVM and Formal based verification approachesDefine testplan,...
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Senior Design Verification Architect
1 week ago
bangalore, India Eximietas Design Full timeEximietas Design Hiring Senior Design Verification Leads/Architects Experience: 8+ Years. Location: Bengaluru Visakhapatnam San Jose, Bay Area Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: # Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans. # Develop and implement...
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Senior Design Verification Architect
1 week ago
bangalore, India Eximietas Design Full timeEximietas Design Hiring Senior Design Verification Leads/Architects Experience: 8+ Years. Location: Bengaluru Visakhapatnam San Jose, Bay Area Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: # Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans. # Develop and implement...
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Design Verification Lead/Manager
6 days ago
bangalore, India Eximietas Design Full timeJob Description: Design Verification Lead/Manager (10+ Years) – BangaloreWe are seeking an experienced Design Verification (DV) Lead/Manager to drive verification strategy, methodology, and execution for complex IP/subsystem/SoC designs. The ideal candidate will bring strong technical depth along with proven leadership capabilities.Key...
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Senior Design Verification Architect
2 weeks ago
bangalore, India Eximietas Design Full timeEximietas Design Hiring Senior Design Verification Leads/ArchitectsExperience: 8+ Years.Location: Bengaluru VisakhapatnamSan Jose, Bay AreaAustin, USA.Anyone with a Valid H1B or Already in US.Job Description:# Lead SoC Design Verification efforts for complex projects, ensuringsuccessful execution of verification plans.# Develop and implement comprehensive...
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Senior Design Verification Engineer
6 days ago
bangalore, India Eximietas Design Full timeWe’re Hiring – Lead Design Verification Engineer @ Eximietas Design! Position: Lead Design Verification Engineer Experience: 7+ Years Locations: Bangalore / Ahmedabad / Pune / Hyderabad Key Skills: Proven experience in Design Verification using SystemVerilog and UVM Strong experience in minimum 2 protocols like AXI, AHB, Ethernet, PCIe, UCIe, DDR, USB,...
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Staff Design Verification
5 days ago
Bangalore Division, India Analog Devices Full timeJob Responsibilities: Verification of complex designs such as accelerators/ datapath IP, processor core subsystems, complex interfaces/ protocols such as DDR/ Ethernet/ USB etc using leading edge methodologies like UVM & Formal DV Architect the testbench and develop the verification environment in UVM and Formal based verification approaches Define testplan,...
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Staff Design Verification
4 days ago
Bangalore Rural, India Analog Devices Full timeJob Responsibilities: Verification of complex designs such as accelerators/ datapath IP, processor core subsystems, complex interfaces/ protocols such as DDR/ Ethernet/ USB etc using leading edge methodologies like UVM & Formal DV Architect the testbench and develop the verification environment in UVM and Formal based verification approaches Define testplan,...
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Staff Design Verification
5 days ago
Bangalore Rural, India Analog Devices Full timeJob Responsibilities:Verification of complex designs such as accelerators/ datapath IP, processor core subsystems, complex interfaces/ protocols such as DDR/ Ethernet/ USB etc using leading edge methodologies like UVM & Formal DVArchitect the testbench and develop the verification environment in UVM and Formal based verification approachesDefine testplan,...
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Staff Design Verification
5 days ago
Bangalore Division, India Analog Devices Full timeJob Responsibilities:Verification of complex designs such as accelerators/ datapath IP, processor core subsystems, complex interfaces/ protocols such as DDR/ Ethernet/ USB etc using leading edge methodologies like UVM & Formal DVArchitect the testbench and develop the verification environment in UVM and Formal based verification approachesDefine testplan,...
