Advanced ASIC Design Specialist

13 hours ago


tamil nadu, India beBeeDigitalFrontEnd Full time

Senior Digital Front-End ASIC Design Engineer PositionWe are seeking a highly skilled Senior Digital Front-End ASIC Design Engineer to join our team. The successful candidate will be responsible for designing and implementing digital front-end ASICs using Verilog/SystemVerilog, with a strong focus on performance, area, and power optimization.Key Responsibilities:Design and implement high-quality, synthesizable RTL for wireless modem IPs and SoC subsystems.Develop micro-architecture specifications and collaborate with system architects, verification, SoC, software, DFT, and physical design teams.Apply low-power design techniques, including clock gating, power gating, and multi-voltage domains.Analyze and optimize for performance, area, and power.Ensure protocol compliance and performance of interconnects, buses (AXI, AHB, APB), and bridges.Conduct CDC and lint checks using tools like Spyglass and resolve waivers.Participate in post-silicon debug and bring-up activities.Requirements:1–3 years of experience in digital front-end ASIC/RTL design.Strong expertise in Verilog/SystemVerilog RTL coding and micro-architecture development.Familiarity with wireless protocols such as IEEE a/b/g/n/ac/ax/be), LTE, or 5G NR is highly desirable.Solid understanding of bus protocols (AXI, AHB, APB) and bridge logic.Experience with wireless modem IPs or similar high-performance digital blocks is a plus.Familiarity with low-power design methodologies and CDC handling.Hands-on experience with tools like Spyglass, 0-in, Design Compiler, PrimeTime, and simulation environments.Exposure to post-silicon debug and SoC integration challenges.Strong documentation and communication skills.Self-motivated with a collaborative mindset and ability to work with minimal supervision.



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