Physical Design Engineer
1 week ago
Job Summary We are seeking a highly experienced Senior Physical Design Engineer with a minimum of 10 years in the RTL to GDSII flow. This role requires hands-on expertise with Cadence Innovus , experience at N3 and below process nodes , and strong scripting and flow debugging skills . Key Responsibilities Lead physical design activities from RTL to GDSII, ensuring high-quality and timely project delivery Execute floorplanning, placement, CTS, routing, and physical verification Develop and maintain automation scripts to streamline physical design tasks Collaborate with RTL, DFT, and verification teams to resolve design issues and achieve timing closure Optimize for power, performance, and area (PPA) to meet design targets Analyze timing, signal integrity, and power reports; implement necessary design changes Mentor junior engineers and promote continuous learning and improvement Stay current with physical design methodologies and integrate best practices Required Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field 10+ years of experience in physical design with deep understanding of RTL to GDSII flow Proven hands-on experience with Cadence Innovus Demonstrated expertise in N3 and below technology nodes Strong scripting skills in Tcl, Perl, or Python , with ability to debug and enhance design flows Successful track record in timing closure, PPA optimization, and resolving complex design challenges Solid grasp of digital design principles including clock distribution, signal integrity, and power analysis Excellent problem-solving and communication skills Preferred Skills Knowledge of low-power design techniques Familiarity with version control systems and collaborative development tools Experience with physical verification tools such as Calibre or Mentor Graphic
-
Senior Physical Design Architects
1 week ago
bangalore district, India Eximietas Design Full timeHi All, Eximietas Hiring Senior Physical Design Architects Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. About the job Qualification Required: Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P&R tools Bachelors OR Masters...
-
Senior Physical Design Manager
1 week ago
bangalore district, India Eximietas Design Full time🚀 Eximietas is Hiring – Senior Physical Design Managers Experience: 15+ Years 📍 Locations: Bengaluru, India Visakhapatnam, India San Jose (Bay Area), USA Austin, USA Eligibility (US Roles): Valid H1B or candidates already in the U.S. About the Role: We are looking for highly experienced Senior Physical Design Leads/Managers to collaborate with...
-
Senior Physical Design Lead
1 week ago
bangalore district, India Eximietas Design Full time🚀 Eximietas is Hiring – Senior Physical Design Leads / Managers Experience: 10+ Years 📍 Locations: Bengaluru, India Visakhapatnam, India San Jose (Bay Area), USA Austin, USA Eligibility (US Roles): Valid H1B or candidates already in the U.S. About the Role: We are looking for highly experienced Senior Physical Design Leads/Managers to collaborate...
-
Physical Design Engineer
1 hour ago
bangalore district, India Tranzium Semi Private Limited Full timeCompany Description Tranzium Semi Private Limited is a leading innovator in the semiconductor and software industry, dedicated to delivering high-performance, power-efficient chips for multinational technology leaders worldwide. Our vision is to be at the forefront of technological innovation, driving the advancement of tomorrow's most advanced technologies....
-
Physical Design Engineer
2 weeks ago
bangalore district, India LeadSoc Technologies Pvt Ltd Full timePhysical Design Engineer Job Summary The Physical Design Engineer will be responsible for the full-chip and/or block-level physical implementation of complex digital, mixed-signal, or RF integrated circuits from RTL to GDSII (the final manufacturing data). This role requires expertise in design methodologies to achieve optimal performance, power, and area...
-
Physical Design Engineer
1 hour ago
bangalore district, India Ulkasemi Full timeJob Overview: Physical Design Engineer implements the entire ASIC/SoC back end design flow from RTL to GDSII to create design databases ready for manufacturing with a special focus on power, performance & area optimization with next generation state of the art process technologies. Physical Design Engineer Experience: 5 Years & above (Mandatory)....
-
Physical Design Engineer
5 days ago
bangalore district, India Mirafra Technologies Full timePhysical Design Engineer (Cadence Innovus) – Bangalore Experience: 3+ Years | Notice Period: Immediate to 30 Days Job Description: Hiring Physical Design Engineers with hands-on experience in Cadence Innovus and low-power design implementation for end-to-end ASIC flow. Key Skills: Floorplanning, Placement, CTS, Routing, Timing Closure DRC/LVS, Power & IR...
-
Senior Physical Design Engineer
2 weeks ago
Bangalore, India Eximietas Design Full timeHi All, Eximietas Hiring Senior Physical Design Leads/Managers. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam. About the job Qualification Required: Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P&R tools Bachelors OR Masters Degree Engineering in Electronics or Electrical or Telecom or VLSI...
-
Senior Physical Design Engineer
7 days ago
Bangalore, India Eximietas Design Full timeHi All, Eximietas Hiring Senior Physical Design Leads/Managers. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. About the job Qualification Required: Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P&R tools Bachelors OR...
-
Physical Design Engineer
1 week ago
bangalore district, India ACL Digital Full timeExperience: 3 - 6 Years Notice period: Immediate Location: Bangalore & Hyderabad Responsibilities Mandatory Experience in Full Chip Timing . Strong background in digital IC design , including floorplanning, placement, routing, clock tree synthesis, and optimization. Tools Expertise : Proficient in Innovus , ICC2 , and Fusion Compiler for place and route,...