Physical Design Engineer
6 days ago
Responsibilities:Complete ownership of Physical Design activities from Floorplan to GDS including PnR,STA,Physical Verification,Take complete ownership for implementation of both Top/Block level designs.Responsible for independent planning and execution of all aspects of physical design including synthesis, floor planning, place and route, Clock Tree Synthesis, Clock Distribution, IP integration, extraction, Timing closure, Power and Signal Integrity Analysis, Physical Verification, DFM and Tape Out on 28nm nodes or below.Must have participated in all stages of the design. (floor planning, placement, CTS, routing, crosstalk avoidance, physical verification, IREM, Timing Closure, constraint (sdc) development)Well versed with the block and chip level timing closure (STA) and timing closure methodologies. Also need to have experience with constraints development. Experience in Hierarchical and Flat timing flow bring-up and timing analysis on interface paths. Block level/Fullchip/SOC level/Mixed signal timing path analysis and fixing.Must have knowledge of low power design. (cpf, upf CLP).Should be able to provide clear directions to the team on various implementation and signoff flowsShould be well versed in LEC flow and debugging issues independently.Role involves tasks in estimating power using industry standard tool , designing power grid , analyze power grid, doing static IR drop, dynamic IR dropRole involves analyzing DRC, LVS,ERC and PERC rule files for industry standard layout verification.Skills & Qualification:Must have minimum Bachelors degree in EE/ECE (degree’s related to electronics) from a reputed institute.Must have at least 10 years of experience, out of which at least 8 years should be related to physical design at chip level / block level.Must have detailed knowledge of EDA tools and flows, Cadence related foundation flows and RTL2GDS flow is desiredExperience in Tcl/Tk, PERL is a Plus
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Senior physical design engineer
2 weeks ago
Bangalore, India Eximietas Design Full timeHi All, Eximietas Hiring Senior Physical Design Leads/Managers. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1 B or Already in US. About the job Qualification Required: Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P& R tools ...
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Senior physical design engineer
1 week ago
Bangalore, India Eximietas Design Full timeHi All, Eximietas Hiring Senior Physical Design Leads/Managers. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1 B or Already in US. About the job Qualification Required: Typically requires a minimum of 10+ years of experience in Physical Design with mainstream...
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Senior Physical Design Engineer
6 days ago
Bangalore, India Eximietas Design Full timeHi All, Eximietas Hiring Senior Physical Design Leads/Managers. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam. About the job Qualification Required: Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P&R tools Bachelors OR Masters Degree Engineering in Electronics or Electrical or Telecom or VLSI...
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Senior physical design lead
2 weeks ago
Bangalore, India Eximietas Design Full timeHi All, Eximietas Hiring Senior Physical Design Leads/Architects Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1 B or Already in US. About the job Qualification Required: Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P& R tools ...
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Senior physical design architects
2 weeks ago
Bangalore, India Eximietas Design Full timeHi All, Eximietas Hiring Senior Physical Design Architects. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1 B or Already in US. About the job Qualification Required: Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P& R tools Bachelors...
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Senior physical design lead
1 week ago
Bangalore, India Eximietas Design Full timeHi All, Eximietas Hiring Senior Physical Design Leads/Architects Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1 B or Already in US. About the job Qualification Required: Typically requires a minimum of 10+ years of experience in Physical Design with mainstream...
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Physical design engineer
4 weeks ago
Bangalore, India HCLTech Full timeJob Summary: We are looking for a highly motivated and experienced Physical Design Lead to join our dynamic team and play a vital role in the physical design and implementation of next-generation integrated circuits (ICs). This leadership role offers the opportunity to leverage your expertise in physical design methodologies and lead a team in achieving...
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Lead Physical Design Engineer
2 weeks ago
Bangalore, India Cadence System Design and Analysis Full timeBE /Btech EXp- 3-7 Yrs Work on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm. • Take ownership of one or more physical design blocks includes all of, floorplan, CTS, PNR, QRC, STA, PV & IR. • Contribute to design methodology, flow automation. • Innovate & implement Power, Performance and Area optimization...
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Physical design engineer
4 weeks ago
Bangalore, India ACL Digital Full timeFull Chip Physical Design Engineer Job Summary: We are seeking a highly motivated and skilled engineer to join our So C implementation team. You will be responsible for the physical design of complex ASICs and So Cs, working on full-chip floorplanning, integration, and signoff activities to meet aggressive PPA (Power, Performance, Area) goals. Key...
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Physical Design Engineer
2 weeks ago
Bangalore, India ACL Digital Full timeFull Chip Physical Design Engineer Job Summary: We are seeking a highly motivated and skilled engineer to join our SoC implementation team. You will be responsible for the physical design of complex ASICs and SoCs, working on full-chip floorplanning, integration, and signoff activities to meet aggressive PPA (Power, Performance, Area) goals. Key...
