Associate FTH

Title - Semi-C (Associate, For Circuit extraction reverse engineering)

Location - Bangalore

Work Duration - 9 Months

About Us:

Unitedlex India Pvt. Ltd. (Formerly known as iRunway India Pvt Ltd) is a data and professional services company delivering outcomes for high-performing law firms and corporate legal departments in the areas of digital litigation, intellectual property, contracts, compliance, and legal operations. Founded in 2006 with a mission to push the boundaries of legal innovation, we provide solutions that enable measurable performance improvement, risk mitigation, revenue gain, cost reduction, and digital business synergy.

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Overview

This position leads the transactional/T&M project delivery for a single or multiple client accounts in diverse areas of technology and Patent Services.

The role involves understanding client requirements and formulating effective teams to ensure high quality delivery to clients. Additionally, the role also involves maintaining high engagement levels of team members and providing them growth opportunities in addition to supporting various operational activities related to clients and people.

Job opportunity

You will do circuit and functional analysis on cutting-edge wireless, memory, and/or System on a Chip devices, built on state-of-the-art 5nm/7nm/16nm finFET process node designs, using your analytical electronics design talents to uncover the innovation that others cannot. You will be essential to reach our objectives as an accomplished engineer with a wide knowledge of basic analogue and digital circuits. This is a current position with a variety of facets that promises ongoing education and professional development.

Job Duties:

• Perform circuit extraction, active and passive device identification using high resolution images of metal layers and active layer stacks of the IC layout.
• Operate proprietary CAD tool to drop recognized devices, set key device parameters (size) and establish connectivity for circuit extraction
• Provide detailed analysis of analog, mixed-signal and/or custom digital circuit designs including partitioning and organizing schematics
• Map active and passive devices to image elements and construct the schematic structure
• Preparing standard cell schematic, schematic hierarchy and layout extraction
• Support customers as needed to discuss technical findings

Desired Skill

• The candidates must have sound knowledge of fabrication methodology and physical layout.
• The candidate should have good understanding of analog building blocks.
• Any hands-on experience with layout tools (such as Cadence Virtuoso) and other tools such as OrCAD is a plus.
• Strong knowledge of CMOS or FinFET circuit design, including basic building blocks such as amplifiers, converters, voltage generation, clocking or digital logic circuits
• Strong understanding of the physical design (layout) of microelectronic devices
• High level of computer proficiency in MS Office suite

Education

• M. Tech/Diploma in VLSI (Layout and schematic design) with sound knowledge of semiconductor technology is preferred.

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