Memory Layout Engineer
1 week ago
Job Title: Memory Layout EngineerExperience: 3+yrs Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory DesignJob Summary:We are looking for a Memory Layout Engineer with strong expertise in physical layout design of memory components such as SRAM, ROM, Register Files, or custom memory IPs. The candidate will be responsible for delivering high-quality, DRC/LVS-clean layouts optimized for performance, area, and power.Key Responsibilities:Design full-custom layouts for memory components like SRAM, ROM, CAM, Register Files, or sense amplifiers.Work closely with circuit designers to understand schematics and translate them into optimized layouts.Floorplanning, transistor-level placement, routing, and matching to meet electrical and physical design constraints.Run physical verification (DRC, LVS, ERC, antenna checks) using industry-standard tools.Perform parasitic extraction (PEX) and assist in post-layout simulation.Ensure layouts meet design rules for process technologies (e.g., 5nm, 7nm, 16nm, 28nm).Implement design automation using SKILL, Python, or Tcl where applicable.Work with cross-functional teams (circuit, verification, CAD) to meet project milestones.Required Skills and Experience:B.E/B.Tech or M.E/M.Tech in Electronics or Electrical Engineering.3 years of hands-on experience in custom layout design, preferably in memory design.Strong understanding of CMOS layout techniques, matching, shielding, and electromigration.Experience with:Tools: Cadence Virtuoso, Calibre DRC/LVS, StarRC, ICC, QRCTechnologies: Advanced FinFET and planar nodes (28nm and below)Deep understanding of design rules (DRC), LVS, and physical verification sign-off flows.Excellent attention to detail, layout quality, and debugging skills.Preferred Qualifications:Experience in compiler-based memory generation or memory compilers.Exposure to high-speed or low-power memory layout optimization techniques.Experience working with foundry design kits (PDKs) and tape-out processes.Scripting experience in SKILL or Python for layout automation and checks.Why Join Us?Work on next-generation memory designs for AI, mobile, and high-performance computing chips.Be part of a highly skilled layout team with access to leading-edge nodes and tools.Competitive salary, performance bonuses, and long-term growth opportunities.Interested can share Cv to Sharmila.b@acldigital.com
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Memory Layout Engineer
5 days ago
Bangalore, India ACL Digital Full timeJob Title: Memory Layout Engineer Experience: 3+yrs Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory Design Job Summary: We are looking for a Memory Layout Engineer with strong expertise in physical layout design of memory components such as SRAM, ROM, Register Files, or custom memory IPs. The candidate will be responsible for...
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Memory Layout Engineer
4 days ago
bangalore, India ACL Digital Full timeACL Digital is looking for smart and enterprising Memory Layout Engineers to come join us and get an opportunity to do some cutting edge work and also work in a great environment where work is Always Fun and Exciting.Experience: 4 to 5 YearsSkills :Having lower node Finfet experience. (10nm & less)Memory compiler layout, SRAM, Register File (RF)Available to...
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Memory Layout Engineer
1 day ago
bangalore, India ACL Digital Full timeACL Digital is looking for smart and enterprising Memory Layout Engineers to come join us and get an opportunity to do some cutting edge work and also work in a great environment where work is Always Fun and Exciting. Experience: 4 to 5 Years Skills : Having lower node Finfet experience. (10nm & less) Memory compiler layout, SRAM, Register File (RF)...
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Memory Layout Engineer
1 week ago
bangalore, India BITSILICA Full timeExp: 3 to 8 Years Location: Bangalore Notice: Immediate - 15 days ✅ Memory Leafcell layout library design from scratch including top level integration. ✅ Good knowledge on different types of memory architectures. ✅ Good knowledge in optimized layout design for better performance. ✅ Sound knowledge & hands on experience in Finfet technology, layout...
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Memory Layout Engineer
1 week ago
bangalore, India BITSILICA Full timeExp: 3 to 8 YearsLocation: Bangalore Notice: Immediate - 15 days✅ Memory Leafcell layout library design from scratch including top level integration.✅ Good knowledge on different types of memory architectures.✅ Good knowledge in optimized layout design for better performance.✅ Sound knowledge & hands on experience in Finfet technology, layout design...
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Memory Layout Design Engineer
1 week ago
IND - Karnataka - BANGALORE, India Globalfoundries Engineering Private Limited Full time ₹ 20,00,000 - ₹ 25,00,000 per yearmemory layout enggPerform process or device design. Typically performs one or more of the following in capacity of either an individual contributor (as directed and/or independently), or as a manager: • Designs new or modifying product system or device to support technology, design enablement, and/or ecosystem and design solutions •...
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Memory Design Engineer
1 day ago
bangalore, India ACL Digital Full timeJob Title: Memory Design Engineer Experience Required: 2+ Years Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory IP Job Summary: We are seeking a skilled Memory Design Engineer to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and validating high-performance and...
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Memory Design Engineers
1 week ago
bangalore, India ACL Digital Full timeJob Title: Memory Design Engineer Experience Required: 2+ Years Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory IP Job Summary: We are seeking a skilled Memory Design Engineer to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and validating high-performance and...
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▷ High Salary! Senior Memory Layout Engineer
3 weeks ago
Bangalore, Karnataka, India Qualcomm Full timeCompany Qualcomm India Private Limited Job Area Engineering Services Group Engineering Services Group Layout Engineer General Summary Develops block macro or chip level layouts and floorplans according to project requirements specifications and design schematics Applies understanding of design manuals established processes layout elements and basic...
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Memory Design Engineer
15 hours ago
bangalore, India ACL Digital Full timeJob Title: Memory Design EngineerExperience Required: 2+ YearsLocation: BangaloreJob Type: Full-timeIndustry: Semiconductors / VLSI / Memory IPJob Summary:We are seeking a skilled Memory Design Engineer to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and validating high-performance and low-power...
