Memory Layout Engineer
2 weeks ago
Job Title: Memory Layout EngineerExperience: 3+yrs Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory DesignJob Summary:We are looking for a Memory Layout Engineer with strong expertise in physical layout design of memory components such as SRAM, ROM, Register Files, or custom memory IPs. The candidate will be responsible for delivering high-quality, DRC/LVS-clean layouts optimized for performance, area, and power.Key Responsibilities:Design full-custom layouts for memory components like SRAM, ROM, CAM, Register Files, or sense amplifiers.Work closely with circuit designers to understand schematics and translate them into optimized layouts.Floorplanning, transistor-level placement, routing, and matching to meet electrical and physical design constraints.Run physical verification (DRC, LVS, ERC, antenna checks) using industry-standard tools.Perform parasitic extraction (PEX) and assist in post-layout simulation.Ensure layouts meet design rules for process technologies (e.g., 5nm, 7nm, 16nm, 28nm).Implement design automation using SKILL, Python, or Tcl where applicable.Work with cross-functional teams (circuit, verification, CAD) to meet project milestones.Required Skills and Experience:B.E/B.Tech or M.E/M.Tech in Electronics or Electrical Engineering.3 years of hands-on experience in custom layout design, preferably in memory design.Strong understanding of CMOS layout techniques, matching, shielding, and electromigration.Experience with:Tools: Cadence Virtuoso, Calibre DRC/LVS, StarRC, ICC, QRCTechnologies: Advanced FinFET and planar nodes (28nm and below)Deep understanding of design rules (DRC), LVS, and physical verification sign-off flows.Excellent attention to detail, layout quality, and debugging skills.Preferred Qualifications:Experience in compiler-based memory generation or memory compilers.Exposure to high-speed or low-power memory layout optimization techniques.Experience working with foundry design kits (PDKs) and tape-out processes.Scripting experience in SKILL or Python for layout automation and checks.Why Join Us?Work on next-generation memory designs for AI, mobile, and high-performance computing chips.Be part of a highly skilled layout team with access to leading-edge nodes and tools.Competitive salary, performance bonuses, and long-term growth opportunities.Interested can share Cv to Sharmila.b@acldigital.com
-
Memory Layout Engineer
7 days ago
Bangalore, India ACL Digital Full timeJob Title: Memory Layout Engineer Experience: 3+yrs Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory Design Job Summary: We are looking for a Memory Layout Engineer with strong expertise in physical layout design of memory components such as SRAM, ROM, Register Files, or custom memory IPs. The candidate will be responsible for...
-
Memory Layout Engineer
3 weeks ago
bangalore, India Capgemini Engineering Full timeRole: Memory/Custom Layout Engineer Experience: 3 to 12 Years Location: Bengaluru Job Description: 3-8 years of experience in Memory/Custom Layout design. Memory Leafcell layout library design from scratch including top level integration. Good knowledge on different types of memory architectures. Good knowledge in optimized layout design for better...
-
Memory Layout Engineer
2 days ago
Bangalore, India ACL Digital Full timeMemory Layout Engineer Location: Bengaluru Experience Required: 3+ Years Employment Type: Full-Time Job Summary: We are seeking an experienced and detail-oriented Memory Layout Engineer with 3+ years of hands-on experience in custom layout design and verification of memory IPs (SRAM, ROM, CAM, etc.). The ideal candidate will have a strong background in...
-
Memory Layout Engineer
2 weeks ago
Bangalore Division, India Capgemini Engineering Full timeRole: Memory/Custom Layout Engineer Experience: 3 to 12 Years Location: Bengaluru Job Description: 3-8 years of experience in Memory/Custom Layout design. Memory Leafcell layout library design from scratch including top level integration. Good knowledge on different types of memory architectures. Good knowledge in optimized layout design for better...
-
Memory Layout Engineer
24 hours ago
bangalore district, India ACL Digital Full timeMemory Layout Engineer Location: Bengaluru Experience Required: 3+ Years Employment Type: Full-Time Job Summary: We are seeking an experienced and detail-oriented Memory Layout Engineer with 3+ years of hands-on experience in custom layout design and verification of memory IPs (SRAM, ROM, CAM, etc.). The ideal candidate will have a strong background in...
-
Memory Layout Engineer
1 day ago
Bangalore Division, India ACL Digital Full timeMemory Layout Engineer Location: Bengaluru Experience Required: 3+ Years Employment Type: Full-Time Job Summary: We are seeking an experienced and detail-oriented Memory Layout Engineer with 3+ years of hands-on experience in custom layout design and verification of memory IPs (SRAM, ROM, CAM, etc.). The ideal candidate will have a strong background in...
-
Memory Layout Engineer
3 days ago
Bangalore, India ACL Digital Full timeACL Digital is looking for smart and enterprising Memory Layout Engineers to come join us and get an opportunity to do some cutting edge work and also work in a great environment where work is Always Fun and Exciting. Experience: 4 to 5 Years Skills : Having lower node Finfet experience. (10nm & less) Memory compiler layout, SRAM, Register File (RF)...
-
Memory Layout Engineer
7 days ago
bangalore, India ACL Digital Full timeACL Digital is looking for smart and enterprising Memory Layout Engineers to come join us and get an opportunity to do some cutting edge work and also work in a great environment where work is Always Fun and Exciting.Experience: 4 to 5 YearsSkills :Having lower node Finfet experience. (10nm & less)Memory compiler layout, SRAM, Register File (RF)Available to...
-
Memory Layout Engineer
1 day ago
bangalore, India ACL Digital Full timeACL Digital is looking for smart and enterprising Memory Layout Engineers to come join us and get an opportunity to do some cutting edge work and also work in a great environment where work is Always Fun and Exciting.Experience: 4 to 5 YearsSkills :- Having lower node Finfet experience. (10nm & less)- Memory compiler layout, SRAM, Register File (RF)-...
-
Memory Layout Specialist
24 hours ago
bangalore, India beBeeMemLayout Full timeMemory Layout SpecialistWe are seeking a skilled Memory Layout Engineer to join our team at ACL Digital.Design and develop memory layout for cutting-edge projectsCollaborate with cross-functional teams to deliver high-quality resultsThe ideal candidate will have 4-5 years of experience in memory compiler layout, SRAM, and Register File (RF) design....
