High-Speed Analog Layout Expert

7 days ago

Malappuram, India beBeeSenior Full time

Job Title: Senior Analog Layout EngineerAbout the Position:We are seeking a highly experienced Senior Analog Layout Engineer to work on high-speed analog chip development in advanced technology. The ideal candidate will operate as an individual contributor, responsible for delivering complex high-speed analog and mixed-signal layout blocks with minimal supervision.Key Responsibilities:Plan and integrate high-speed analog IPs at the chip level.Perform complete analog layout design, including floorplanning, routing, matching, shielding, EM/IR checks, and parasitic optimization.Run post-layout simulations (extracted netlist, corners, Monte Carlo) and ensure correlation with schematic.Lead IP verification, including DRC, LVS, ERC, ANT, PEX, and reliability checks.Drive complete IP signoff ownership, ensuring zero violations at final GDS delivery.Collaborate with foundry teams for PDK clarifications, LVS/DRC rule updates, model issues, and tape-out requirements.Requirements:8+ years of experience in Analog/Mixed-Signal Layout.Deep expertise in high-speed IPs (SERDES, PLL, ADC/DAC, Tx/Rx, clocking blocks).Strong understanding of chip-level integration, hierarchy, and physical interfaces.Hands-on experience with ICC2 and top-level integration flows.Ability to run simulations for the blocks being designed (post-layout, extracted).Preferred Skills:Experience working with advanced nodes (5nm).Exposure to SERDES / PCIe / MIPI / USB high-speed IPs.Experience working with global customers.Work Environment:This role requires strong technical expertise and excellent communication skills. The ideal candidate will be willing to travel to the U.S. for project release (as required).Equal Opportunity Statement:We value diversity and inclusivity in our workplace.

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