
Physical Design Lead
9 hours ago
Hello Folks, we at LTTS are looking for Physical design Lead role with 8+ years of experience.
Deatiled JD is below as mentioned...
Candidates with PnR – 8+ ’ experience
• IP/Block level PnR activities from Netlist to GDS-II.
• Good knowledge of all PnR activities like Floor-planning, Placement, CTS, Routing, Timing closure(STA), signoff checks like FEV, VCLP, EMIR and PV.
• Knowledge of industry stanrd E tools (Synops, Cadence, Mentor)
• Worked on DSM technologies, tsmc 5nm and below experience preferred.
• Knowledge of scripting skills.
• Minimum Experience : 8+
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Physical Design Lead
7 hours ago
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Lead Physical Design Engineer
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Lead Physical Design Engineer
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Senior Physical Design Architects
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Lead Physical Design Engineer
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Lead Physical Design Engineer
9 hours ago
bangalore, India BITSILICA Full timeAbout the Company Bitsilica is a company that specializes in physical design implementation of large ASIC’s. Our mission is to provide cutting-edge solutions in the semiconductor industry while fostering a culture of innovation and collaboration.About the Role We are looking for a candidate with relevant work experience in physical design implementation of...
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Senior Physical Design Architects
10 hours ago
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Technical Lead physical design
6 hours ago
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Senior Physical Design Engineer
1 day ago
Bangalore, India Eximietas Design Full timeHi All, Eximietas Hiring Senior Physical Design Leads/Managers (EMIR). Experience: 8+ Years. Location: Bengaluru. About the job Qualification Required: (EMIR). Block / Subsystem / Partition • Role: EM/IR. • EDA Tool: Redhawk & Node: TSMC 3nm / 5nm. • ESD resistance, PG Grid, Static/Dynamic power, SRP, BQM checks - Running/...
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Technical Lead physical design
8 hours ago
bangalore, India HCLTech Full timeAbout HCL:HCLTech offers end-to-end semiconductor services across the entire chip lifecycleDesign Services: RTL design, microarchitecture, verification, and tape-out.Package Design: Substrate layout, bonding diagrams, and routability analysis.Test & Validation: Memory BIST, wafer sort, probe card design, pre/post-silicon validation.Qualification &...