DFT Engineer
2 weeks ago
Job Title: DFT Engineer
Experience: 10 – 20 Years
This is for our client (semiconductor Manufacturing) Based in Bengaluru.
Key Skills & Responsibilities:
Hands-on experience in DFT: Scan Insertion, MBIST, JTAG, ATPG, and Pattern Validation at block and full-chip levels.
Strong knowledge of DFT concepts: Scan Insertion, BIST, LBIST, ATPG, DFT Mode Timing Analysis, and Sign-Off.
Understanding of DFT Architectures: Boundary Scan (JTAG), Scan Compression Techniques (XOR, OP-MISR), and Scan Chain Verification.
Expertise in generating scan patterns and coverage statistics for fault models (stuck-at, IDDQ, transition faults, JTAG BSDL, E-fuse pattern generation).
Proficiency with Synopsys (DFT MAX, TetraMAX, VCS), Cadence (Genus, Modus, Xcelium), and Mentor Graphics (Tessent, TestKompress) tools.
Experience in RTL integration, timing analysis, and debugging.
Knowledge of Verilog, RTL simulation, Spyglass, and gate-level pattern simulations.
Scripting skills: Perl, TCL.
Exposure to post-silicon debug is a plus.
Expectations:
Strong debugging and problem-solving abilities.
Excellent communication skills for effective stakeholder engagement.
Ability to work independently, demonstrate leadership, and maintain focus on project goals with a go-getter attitude.
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