Opening for Senior RTL design role
6 days ago
HiOpening for RTL Design Lead role4-12+ yrs exp, FEINT (front end integration), skill set on RTL linting, CDC/RDC checks, logic synthesis, LEC in ECO context.Please share your resume to jayalakshmi.r2@ust.comRegards,Jaya
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Opening for FPGA Design role
2 days ago
bangalore, India UST Full timeHi,We have an opening for FPGA Design engineer role - BangaloreREQUIRED:EXP: 5 to 12 years- Experience with FPGA system design from IP Integration to implementation, Verilog RTL based IP design, Verilog/System Verilog based testbench development- Experience with AMD Vivado & Vitis SDK & VItis AI tools.- Experience with C/C++ in developing Embedded FW &...
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Senior RTL Lead Microarchitect
2 weeks ago
Bangalore Division, India Eximietas Design Full timeHi All, Greetings' from Eximietas Design ....! We are Hiring RTL Micro Architect Engineers/Leads ...! Job Title: RTL Micro Architect. Experience: 8+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: Eximietas Design is seeking an experienced and highly skilled RTL...
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ASIC SOC RTL Design Architect
6 days ago
bangalore, India Eximietas Design Full timeHi All,Eximietas Design Hiring Senior RTL Design (Micro-architecture) Architects / Sr. Manager.Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.❖ Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics.❖ Engineering 10+ years of ASIC SOC...
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RTL Micro Architect
6 days ago
bangalore, India Eximietas Design Full timeEximietas Hiring: ASIC SOC RTL Micro Architect Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled RTL Micro Architect to join our growing team. As a key contributor, you will play a critical role...
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Sr RTL Principal Design Engineer
4 days ago
bangalore, India Cadence System Design and Analysis Full timeRTL Design Engineer for Interface Controller IP development team.Position is based in Bangalore or Noida.The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...
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ASIC SOC RTL Design Lead
6 days ago
bangalore, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads..!Experience: 8+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled ASIC...
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Opening for FPGA Design role
2 days ago
bangalore, India UST Full timeHi,We have an opening for FPGA Design engineer role - BangaloreREQUIRED: EXP: 5 to 12 years Experience with FPGA system design from IP Integration to implementation, Verilog RTL based IP design, Verilog/System Verilog based testbench developmentExperience with AMD Vivado & Vitis SDK & VItis AI tools.Experience with C/C++ in developing Embedded FW & scripting...
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FPGA RTL Design Engineer
2 weeks ago
bangalore, India FiniteHR Consulting Full timeCompany Description Finite HR Consulting Job Description Our Client SeviTech is looking for FPGA RTL Design Engineer / Senior EngineerAbout our Client: Job Designation: FPGA RTL Design Engineer / Senior EngineerJob Location: BangaloreJob Type: Permanent FPGA RTL Design Engineer / Senior EngineerJob Description:• You will be responsible for IP /...
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ASIC SOC RTL Design Lead
2 weeks ago
Bangalore, India Eximietas Design Full timeHi All, Greetings' from Eximietas Design....! We are Hiring ASIC SOC RTL Design Engineer/Leads. Job Title: ASIC SOC RTL Design Engineer/Leads ..! Experience: 8+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: Eximietas Design is seeking an experienced and highly...
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Opening for FPGA Design role
3 days ago
Bangalore, India UST Full timeHi, We have an opening for FPGA Design engineer role - Bangalore REQUIRED: EXP: 5 to 12 years Experience with FPGA system design from IP Integration to implementation, Verilog RTL based IP design, Verilog/System Verilog based testbench development Experience with AMD Vivado & Vitis SDK & VItis AI tools. Experience with C/C++ in developing Embedded FW &...