High-Speed Analog Design Expert

2 weeks ago

solapur, India beBeeAnalog Full time

Senior Analog Layout Engineer Job DescriptionWe are seeking a highly experienced Senior Analog Layout / IP Delivery Engineer to join our team. This role requires deep knowledge of ICC2-based top-level integration, extensive IP verification experience, and the ability to run block-level simulations independently. Key Responsibilities: Analog Layout & Integration: Lead chip-level planning and integration of high-speed analog IPs, execute complete analog layout design including floor planning, routing, device matching, shielding, EM/IR checks, and parasitic optimization. IP Verification & Signoff: Own the entire IP verification process: DRC, LVS, ERC, ANT, PEX, and reliability checks, ensure zero-violation GDS delivery for IP signoff, work closely with foundry teams on PDK clarifications, rule updates, model issues, PEX discussions, and tape-out requirements. Cross-Functional Collaboration: Coordinate with PD, DV, circuit design, packaging, and integration teams for seamless IP delivery, prepare and deliver comprehensive IP documentation, abstracts, verification reports, and final GDS. Required Skills and Qualifications: Mandatory hands-on experience with TSMC 5nm.Strong understanding of ICC2 flows for complete SoC/top-level integration.Ability to run extracted and post-layout simulations for designed blocks. Benefits: 8+ years of proven experience in Analog/Mixed-Signal Layout.Deep expertise in high-speed IPs: SERDES, PLL, ADC/DAC, Tx/Rx, clocking blocks.Strong understanding of chip-level hierarchy, integration, and physical interfaces.

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    solapur, India beBeeEngineer Full time

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