Senior DFT Architect Position Available

3 days ago

belgaum, India beBeeDft Full time

Job Title: DFT ArchitectWe are seeking a seasoned architect to lead the development of Digital Fault Tolerance (DFT) solutions for complex SoC/ASIC designs.Key Responsibilities:Develop and drive DFT architecture strategy across multiple projects.Collaborate with cross-functional teams, including RTL, STA, and test engineering.Lead implementation and verification of DFT features, such as scan insertion and compression, ATPG pattern generation, MBIST and Logic BIST insertion and validation.Manage end-to-end DFT flow from RTL to gate-level netlist and silicon bring-up.Own DFT signoff, timing closure, and ATE pattern delivery.Required Skills and Qualifications:B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Design.7+ years of experience in DFT for complex ASIC or SoC designs.Expertise in scan insertion, compression, ATPG, MBIST, and boundary scan.Hands-on experience with DFT tools, including Synopsys DFT Compiler, TetraMAX, TestMAX.Benefits:Competitive salary and leadership opportunities.Chance to collaborate with top-tier engineers and global semiconductor leaders.

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