Current jobs related to Opening for FPGA Verification role - bangalore district - UST

  • Opening for FPGA Verification role

    2 weeks ago

    bangalore, India UST Full time

    Hi,Please find the JD below.FPGA Verification, 4 to 7 years of experience.- Develop and implement verification plans for FPGA designs.- Design and maintain testbenches for FPGA projects.- Conduct functional simulations and analyze results.- Collaborate with design engineers to understand design intent and constraints.- Document verification processes and...

  • Opening for FPGA Verification role

    2 weeks ago

    bangalore, India UST Full time

    Hi, Please find the JD below. FPGA Verification, 4 to 7 years of experience. Develop and implement verification plans for FPGA designs. Design and maintain testbenches for FPGA projects. Conduct functional simulations and analyze results. Collaborate with design engineers to understand design intent and constraints. Document verification processes and...

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    1 week ago

    bangalore, India UST Full time

    Hi, Please find the JD below. FPGA Verification, 4 to 7 years of experience. Develop and implement verification plans for FPGA designs. Design and maintain testbenches for FPGA projects. Conduct functional simulations and analyze results. Collaborate with design engineers to understand design intent and constraints. Document verification processes and...

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  • Opening for FPGA Design role

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    Hi, We have an opening for FPGA Design engineer role - Bangalore REQUIRED: EXP: 5 to 12 years Experience with FPGA system design from IP Integration to implementation, Verilog RTL based IP design, Verilog/System Verilog based testbench development Experience with AMD Vivado & Vitis SDK & VItis AI tools. Experience with C/C++ in developing Embedded FW &...

  • Opening for FPGA Design role

    6 days ago

    bangalore, India UST Full time

    Hi, We have an opening for FPGA Design engineer role - Bangalore REQUIRED: EXP: 5 to 12 years Experience with FPGA system design from IP Integration to implementation, Verilog RTL based IP design, Verilog/System Verilog based testbench development Experience with AMD Vivado & Vitis SDK & VItis AI tools. Experience with C/C++ in developing Embedded FW &...

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  • FPGA Verification Engineer

    7 days ago

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    6 days ago

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Opening for FPGA Verification role

2 weeks ago

bangalore district, India UST Full time

Hi, Please find the JD below. FPGA Verification, 4 to 7 years of experience. Develop and implement verification plans for FPGA designs. Design and maintain testbenches for FPGA projects. Conduct functional simulations and analyze results. Collaborate with design engineers to understand design intent and constraints. Document verification processes and results. Identify, debug, and resolve issues found during verification. Stay up-to-date with industry best practices in FPGA verification. Please share your resume to jayalakshmi.r2@ust.com Regards, Jaya