Principal Architect – Isolated Gate Driver IC

Role Description:Principal Architect – Isolated Gate Driver ICPurpose:We are looking for a Principal Architect with deep expertise in isolated gate driver IC design for SiC and GaN power devices to lead innovation in our Energy business. You will define and drive next-generation high-performance gate drivers used in SiC/GaN-based power modules for solar inverters, energy storage systems, grid-tied converters, and fast EV chargers. The developed architectures and IP will also support Automotive (EV traction, onboard chargers) and Industrial (motor drives, robotics, power supplies) markets, ensuring a scalable, platform-based approach to wide-bandgap driver solutions.Areas Of Responsibility:Lead architecture and design definition for isolated gate driver ICs used with SiC and GaN power switches, optimized for high switching speed, high CMTI, and robustness.Architect complete driver solutions including:High/low side output stages (with Miller clamp, active pull-up/down, configurable source/sink)Isolation interface (capacitive, magnetic, or optical)Integrated protections (UVLO, DESAT, SCP, soft turn-off, active clamp)Diagnostic and telemetry features (SPI/I²C interface, status flags)Define system-level integration strategy for energy platforms, ensuring reliable performance across wide operating voltages, temperatures, and transient conditions.Ensure design meets isolation standards (UL1577, VDE0884, IEC 60747-17) and supports high CMTI (>100 kV/µs) performance.Collaborate with SiC/GaN FET designers, power module architects, and system teams to define drive strength, layout constraints, and thermal performance targets.Guide the team on HV layout practices, creepage/clearance, EMI reduction, and packaging co-design.Drive IP reuse, design scalability, and enable the gate driver IP to be leveraged across energy, automotive, and industrial portfolios.Lead architecture reviews, mentoring, and documentation of system specifications and design decisions.Contribute to long-term roadmap and technology strategy for wide-bandgap driver solutions across all business unitsTechnical SkillsExpert in gate driver circuit design for wide-bandgap devices (SiC MOSFETs, GaN HEMTs).Strong understanding of:Level shifters, push-pull buffers, active clamps, and short-circuit protectionIsolation technologies and barrier design (capacitive/magnetic/optical)High-side/low-side driver pairing and bootstrap techniquesExperience with protection and diagnostics: UVLO, DESAT, OCP, OTP, and integrated fault reporting.Knowledge of high-voltage (>600 V) and high-frequency (>100 kHz–1 MHz) design constraints.Tools: Cadence Virtuoso, Spectre, MATLAB, and simulation tools (e.g., PLECS, ADS, LTspice).System-level co-design experience with SiC/GaN switches, power modules, and packaged solutions.Strong foundation in EMI/EMC, thermal behavior, and safe operating area (SOA) managementBehavioral Skills:Strategic Thinking: Ability to define long-term technology direction aligned with energy market trends.Technical Leadership: Influences and mentors multi-disciplinary teams with clarity and technical depth.Cross-Functional Collaboration: Works effectively with hardware, software, mechanical, and systems engineering teams.Customer Focus: Strong system-level thinking with sensitivity to application requirements and product value.Innovation Mindset: Drives continuous improvement, patent generation, and competitive differentiation.Decision-Making: Balances risk, performance, and timeline in high-impact technical decisions.Communication: Strong verbal and written communication to present architectures, trade-offs, and strategy to execs and peers.Qualifications:M.Tech or Ph.D. in Electrical Engineering, Microelectronics, or related field.10-15+ years of experience in analog/mixed-signal design, including at least 5+ years in gate driver design for SiC/GaN.Proven ability to architect and productize isolated gate drivers for high-performance applications.