Senior Analog Mixed Signal IC Design Engineer

3 weeks ago

hyderabad, India Cyient Full time

Dear Applicant

We, Cyient is hiring for Sr Specialist/ Engineers: Analog Mixed Signal Circuit Design ( End to End Offshore-Onshore Model based Global Product R&D from Scratch).

Experience Range: 3-5 Years
Base Location: Hyderabad
Budget: Open for Discussion, based on candidate expertise level.

Pls note: We are looking for one of the finest Analog-Mixed Signal Circuit/ IC Design Specialist who must have strong experience in PMIC ( Power Management) with LDO/ VCO & PLL Architecture (Good to have) & who can work in Core Lab R&D Solution from scratch.

Job Description:
The candidate should have experience in Analog and Mixed Signal Design with focus on PMIC blocks such as DC-DC converter (BUCK,BOOST), LDOs and clocking circuits. Strong fundamentals of CMOS design, and active filter design. The various task involves, circuit design, validation, mixed signal validation, and reliability validation.
Exposure to PMIC designs High speed digital circuit design and analysis with timing and flow closure. Digitally assisted analog circuit and techniques. The candidate will be responsible for the High speed, low power, and reliable analog and digital circuits for various areas of PLL. Good knowledge of control systems, Bandgap reference, bias, op-amps, feedback and compensation techniques.
You will be joining an expanding analog/mixed-signal circuit design team involved in design and development on cutting-edge foundry process development nodes.
Your responsibilities will include but not be limited to:
The candidate should have experience in Analog and Mixed Signal
Design with focus on Analog blocks and clocking circuits. Strong fundamentals of CMOS design, passive RC circuits, switched cap circuits are a must for this role
The various task involves, circuit design, validation, mixed signal validation, and reliability validation.
High speed digital circuit design and analysis with timing and flow closure. Digitally assisted analog circuit and techniques.
The candidate will be responsible for the High speed, low power, and reliable analog and digital circuits for various areas of PLL. Good knowledge of control systems, band gaps, bias, op-amps, LDOs, feedback and compensation techniques. Experience in LC VCO/DCO design.
Good exposure to performance parameters of VCO as well as complete PLL architecture.

Interested Applicants, Kindly share updated CV & availability slots to rajanikant.sharma@cyient.com for detailed discussion.

Best Regards
Rajani Kant Sharma
Sr Recruiter: Semiconductor Vertical: Complete AMS Solution & ASIC Flow Hiring
Cyient

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