Principal Digital Verification Engineer

Principal Design Verification Engineer - CXL / PCIe BangaloreAbout companyTop40 Semiconductor Organization in the worldWe are seeking talented Design Verification Engineers with proven expertise in industry-standard protocols such as PCIe, Ethernet and CXL. You will play a key role in the functional verification of designs, from developing block-level and...

Technical Specialist - Design VerificationLocation: Bangalore, Noida, Pune. Experience: 8–14 Years.About the Role:We are looking for an experienced and passionate Senior Design Verification Engineer to join our team in Bangalore. The ideal candidate will have a strong background in pre-silicon verification of complex IPs or SoCs and be capable of leading...

Lead Functional Verification EngineerExperience: 6+ YearsLocation: BangaloreJob Description:Lead verification activities for complex CPU cores, memory subsystems, and high-speed PCIe IPs.Define verification strategy, test plan, and coverage goals based on architecture and spec reviews.Build and maintain advanced UVM-based testbenches for block and...

NoC Verification EngineerExperience: 7 to 14 YearsKey Responsibilities:Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and...

Formal Verification Engineer Experience: 4 to 12 YearsLocation: BangaloreJob DescriptionResponsible for developing and executing formal verification strategies for IP and SoC blocks.Write and prove assertions using SystemVerilog Assertions (SVA) or PSL.Use tools like JasperGold, VC Formal, or OneSpin to verify complex designs.Collaborate with design and DV...

Hi All,ACL Digital is hiring #Senior #Design #Verification Engineer!Experience: 4 Years Location: Bangalore / HyderabadNotice Period: Immediate to 30 Days Preferred!We're seeking experienced professionals ASIC/SoC verification. If you have expertise in UVM/System Verilog, proficiency in scripting languages like Python/Perl/TCL, and a strong grasp of...

We are looking for a motivated candidate to work with our Design Verification team. The role involves working on real number modeling and verification of mixed-signal designs using System Verilog and UVM methodologies. This is a hands-on opportunity to gain experience in advanced verification flows and contribute to real-world projects.Exp: 3+ YearsLocation:...

Senior Design Verification EngineerLocation: Bangalore.Experience: 4 to 10 Years.Notice Period: Any.Perform verification of complex digital designs at block and system level.Develop testbenches using SystemVerilog/UVM for simulation and debugging.Create and execute comprehensive test plans for functional verification.Achieve coverage targets using code and...

SOC RTL Design VerificationExperience: 4 to 10 YearsLocation: BangaloreKey Responsibilities:• Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, good understanding of SOC boot flow, integration level verification• Development and verification of post-si validation sequences using C/C++• Create methodology-based (UVM)...

Microsoft Silicon Cloud Hardware and Infrastructure Engineering SCHIE is the team behind Microsoft s expanding Cloud Infrastructure and responsible for powering Microsoft s Intelligent Cloud mission SCHIE delivers the core infrastructure and foundational technologies for Microsoft s over 200 online businesses including Bing MSN Office 365 Xbox Live Teams...