Full Chip STA Expertise Required

1 week ago


kochi, India beBeeChipTimingLead Full time

Chip Timing LeadThis key role requires an experienced Chip Timing Lead with expertise in chip-level timing, constraint optimization and collaboration. The ideal candidate will lead the closure of complex SoCs timing activities and provide technical guidance to junior engineers.Key Responsibilities:Functional Constraints ManagementStatic Timing Analysis (STA) for block and chip sign-offTop-Level ECO Generation Coordination with block ownersCollaboration in Block and Top-Level SynthesisAutomation Initiatives Driving using scripting languagesJunior Engineers Mentorship on Technical AspectsRequirements:8+ years of experience in chip STA and constraint optimizationProven expertise in chip-level constraints handling, STA sign-off, and ECO flowStrong scripting skills and ability to drive automation initiativesExcellent communication and collaboration abilities


  • Chief STA Architect

    2 weeks ago


    kochi, India beBeeFullChipLead Full time

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